Widen several accumulated counter fields in the smu_v13_0_6 GPU metrics definition from U32 to U64 to be consistent with the equivalent field definitions in smu_v15_0_8
Signed-off-by: Asad Kamal <[email protected]> --- .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h | 20 +++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h index a66bf33dbb58..011fc6eeb7ad 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h @@ -144,15 +144,15 @@ extern const struct smu_temp_funcs smu_v13_0_12_temp_funcs; SMU_SCALAR(SMU_MATTR(ACCUMULATION_COUNTER), SMU_MUNIT(NONE), \ SMU_MTYPE(U64), accumulation_counter); \ SMU_SCALAR(SMU_MATTR(PROCHOT_RESIDENCY_ACC), SMU_MUNIT(NONE), \ - SMU_MTYPE(U32), prochot_residency_acc); \ + SMU_MTYPE(U64), prochot_residency_acc); \ SMU_SCALAR(SMU_MATTR(PPT_RESIDENCY_ACC), SMU_MUNIT(NONE), \ - SMU_MTYPE(U32), ppt_residency_acc); \ + SMU_MTYPE(U64), ppt_residency_acc); \ SMU_SCALAR(SMU_MATTR(SOCKET_THM_RESIDENCY_ACC), SMU_MUNIT(NONE), \ - SMU_MTYPE(U32), socket_thm_residency_acc); \ + SMU_MTYPE(U64), socket_thm_residency_acc); \ SMU_SCALAR(SMU_MATTR(VR_THM_RESIDENCY_ACC), SMU_MUNIT(NONE), \ - SMU_MTYPE(U32), vr_thm_residency_acc); \ + SMU_MTYPE(U64), vr_thm_residency_acc); \ SMU_SCALAR(SMU_MATTR(HBM_THM_RESIDENCY_ACC), SMU_MUNIT(NONE), \ - SMU_MTYPE(U32), hbm_thm_residency_acc); \ + SMU_MTYPE(U64), hbm_thm_residency_acc); \ SMU_SCALAR(SMU_MATTR(GFXCLK_LOCK_STATUS), SMU_MUNIT(NONE), \ SMU_MTYPE(U32), gfxclk_lock_status); \ SMU_SCALAR(SMU_MATTR(PCIE_LINK_WIDTH), SMU_MUNIT(NONE), \ @@ -164,9 +164,9 @@ extern const struct smu_temp_funcs smu_v13_0_12_temp_funcs; SMU_SCALAR(SMU_MATTR(XGMI_LINK_SPEED), SMU_MUNIT(SPEED_1), \ SMU_MTYPE(U16), xgmi_link_speed); \ SMU_SCALAR(SMU_MATTR(GFX_ACTIVITY_ACC), SMU_MUNIT(PERCENT), \ - SMU_MTYPE(U32), gfx_activity_acc); \ + SMU_MTYPE(U64), gfx_activity_acc); \ SMU_SCALAR(SMU_MATTR(MEM_ACTIVITY_ACC), SMU_MUNIT(PERCENT), \ - SMU_MTYPE(U32), mem_activity_acc); \ + SMU_MTYPE(U64), mem_activity_acc); \ SMU_SCALAR(SMU_MATTR(PCIE_BANDWIDTH_ACC), SMU_MUNIT(PERCENT), \ SMU_MTYPE(U64), pcie_bandwidth_acc); \ SMU_SCALAR(SMU_MATTR(PCIE_BANDWIDTH_INST), SMU_MUNIT(BW_1), \ @@ -178,9 +178,9 @@ extern const struct smu_temp_funcs smu_v13_0_12_temp_funcs; SMU_SCALAR(SMU_MATTR(PCIE_REPLAY_ROVER_COUNT_ACC), SMU_MUNIT(NONE), \ SMU_MTYPE(U64), pcie_replay_rover_count_acc); \ SMU_SCALAR(SMU_MATTR(PCIE_NAK_SENT_COUNT_ACC), SMU_MUNIT(NONE), \ - SMU_MTYPE(U32), pcie_nak_sent_count_acc); \ + SMU_MTYPE(U64), pcie_nak_sent_count_acc); \ SMU_SCALAR(SMU_MATTR(PCIE_NAK_RCVD_COUNT_ACC), SMU_MUNIT(NONE), \ - SMU_MTYPE(U32), pcie_nak_rcvd_count_acc); \ + SMU_MTYPE(U64), pcie_nak_rcvd_count_acc); \ SMU_ARRAY(SMU_MATTR(XGMI_READ_DATA_ACC), SMU_MUNIT(DATA_1), \ SMU_MTYPE(U64), xgmi_read_data_acc, \ SMU_13_0_6_NUM_XGMI_LINKS); \ @@ -203,7 +203,7 @@ extern const struct smu_temp_funcs smu_v13_0_12_temp_funcs; SMU_SCALAR(SMU_MATTR(CURRENT_UCLK), SMU_MUNIT(CLOCK_1), \ SMU_MTYPE(U16), current_uclk); \ SMU_SCALAR(SMU_MATTR(PCIE_LC_PERF_OTHER_END_RECOVERY), \ - SMU_MUNIT(NONE), SMU_MTYPE(U32), \ + SMU_MUNIT(NONE), SMU_MTYPE(U64), \ pcie_lc_perf_other_end_recovery); \ SMU_ARRAY(SMU_MATTR(GFX_BUSY_INST), SMU_MUNIT(PERCENT), \ SMU_MTYPE(U32), gfx_busy_inst, SMU_13_0_6_MAX_XCC); \ -- 2.46.0
