From: Gabe Teeger <[email protected]> [Why] DCN4 variant had IPS completely disabled via ips_support = false and dc->config.disable_ips = DMUB_IPS_DISABLE_ALL. Enabling IPS for D3 allows DMUB to manage idle power savings when the display subsystem is inactive, reducing platform power without affecting active display operation.
[How] In DCN4 variant resource construct: - Set dc->caps.ips_support = true - Remove dc->config.disable_ips = DMUB_IPS_DISABLE_ALL override This enables DMUB to dynamically manage IPS entry/exit during D3 power state transitions. Also enable zstate by default. Reviewed-by: Ovidiu (Ovi) Bunea <[email protected]> Signed-off-by: Gabe Teeger <[email protected]> Signed-off-by: Matthew Stewart <[email protected]> Signed-off-by: George Zhang <[email protected]> --- .../gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c index 330e82b0974b..1bc2452b271f 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c @@ -1988,11 +1988,10 @@ static bool dcn42b_resource_construct( dc->caps.dmcub_support = true; dc->caps.is_apu = true; dc->caps.seamless_odm = true; - dc->caps.zstate_support = false; - dc->caps.ips_support = false; + dc->caps.zstate_support = true; + dc->caps.ips_support = true; dc->caps.max_v_total = (1 << 15) - 1; dc->caps.vtotal_limited_by_fp2 = true; - dc->config.disable_ips = DMUB_IPS_DISABLE_ALL; /* Color pipeline capabilities */ dc->caps.color.dpp.dcn_arch = 1; -- 2.55.0
