Fix the error cleanup path in gfx_v9_4_3_set_userq_eop_interrupts() by
using the correct loop condition. This ensures all previously enabled
EOP IRQs are released if setup fails.
Fixes: 832f0aa050ff ("drm/amdgpu/gfx9.4.3: add support for disabling kernel
queues")
Reported-by: Dan Carpenter <[email protected]>
Cc: Kent Russell <[email protected]>
Cc: Alex Deucher <[email protected]>
Signed-off-by: Srinivasan Shanmugam <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 44d38b76cb4f..9512fef81d84 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -2331,7 +2331,7 @@ static int gfx_v9_4_3_set_userq_eop_interrupts(struct
amdgpu_device *adev,
}
}
for (xcc_id--; xcc_id >= 0; xcc_id--) {
- for (m = adev->gfx.mec.num_mec - 1; m <= 0; m--) {
+ for (m = adev->gfx.mec.num_mec - 1; m >= 0; m--) {
for (p = adev->gfx.mec.num_pipe_per_mec - 1; p >= 0;
p--) {
irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
+ (m * adev->gfx.mec.num_pipe_per_mec)
+ p;
--
2.34.1
