From: Aurabindo Pillai <[email protected]> Add hooks in various entry points to perform hw/sw init for DCN6 asic
Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Roman Li <[email protected]> Reviewed-by: Ivan Lipski <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15 +++++++++------ .../drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c | 10 ++++++++++ .../drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.h | 1 + .../drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 9 +++++++-- .../amd/display/dc/bios/command_table_helper2.c | 1 + drivers/gpu/drm/amd/display/include/dal_types.h | 1 + 7 files changed, 30 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index cf9c4b8df28b..45762096b20b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -2658,6 +2658,7 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) case IP_VERSION(4, 1, 0): case IP_VERSION(4, 2, 0): case IP_VERSION(4, 2, 1): + case IP_VERSION(6, 0, 0): /* TODO: Fix IP version. DC code expects version 4.0.1 */ if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, 0)) adev->ip_versions[DCE_HWIP][0] = IP_VERSION(4, 0, 1); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index df6b59fb8d0d..0dcf829c1d07 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1011,6 +1011,7 @@ static int load_dmcu_fw(struct amdgpu_device *adev) case IP_VERSION(4, 0, 1): case IP_VERSION(4, 2, 0): case IP_VERSION(4, 2, 1): + case IP_VERSION(6, 0, 0): return 0; default: break; @@ -2410,6 +2411,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case IP_VERSION(4, 0, 1): case IP_VERSION(4, 2, 0): case IP_VERSION(4, 2, 1): + case IP_VERSION(6, 0, 0): if (amdgpu_dm_register_outbox_irq_handlers(dm->adev)) { drm_err(adev_to_drm(adev), "DM: Failed to initialize IRQ\n"); goto fail; @@ -2436,6 +2438,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case IP_VERSION(4, 0, 1): case IP_VERSION(4, 2, 0): case IP_VERSION(4, 2, 1): + case IP_VERSION(6, 0, 0): psr_feature_enabled = true; break; default: @@ -2455,6 +2458,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case IP_VERSION(3, 6, 0): case IP_VERSION(4, 2, 0): case IP_VERSION(4, 2, 1): + case IP_VERSION(6, 0, 0): replay_feature_enabled = true; break; @@ -2617,6 +2621,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case IP_VERSION(4, 0, 1): case IP_VERSION(4, 2, 0): case IP_VERSION(4, 2, 1): + case IP_VERSION(6, 0, 0): if (amdgpu_dm_dcn10_register_irq_handlers(dm->adev)) { drm_err(adev_to_drm(adev), "DM: Failed to initialize IRQ\n"); goto fail; @@ -2829,6 +2834,7 @@ static int dm_early_init(struct amdgpu_ip_block *ip_block) case IP_VERSION(4, 0, 1): case IP_VERSION(4, 2, 0): case IP_VERSION(4, 2, 1): + case IP_VERSION(6, 0, 0): adev->mode_info.num_crtc = 4; adev->mode_info.num_hpd = 4; adev->mode_info.num_dig = 4; @@ -6320,12 +6326,9 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, if (dm_new_crtc_state->cursor_mode == DM_CURSOR_OVERLAY_MODE) continue; - /* Check if rotation or scaling is enabled on DCN401 */ - if ((drm_plane_mask(crtc->cursor) & - new_crtc_state->plane_mask) && - (amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(4, 2, 1) || - amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(4, 2, 0) || - amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(4, 0, 1))) { + /* Check if rotation or scaling is enabled on DCN 4x and above */ + if ((drm_plane_mask(crtc->cursor) & new_crtc_state->plane_mask) && + (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(4, 0, 1))) { new_cursor_state = drm_atomic_get_new_plane_state(state, crtc->cursor); is_rotated = new_cursor_state && diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c index 8e35d9ec22d6..9ff25bc8ee5a 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c @@ -63,6 +63,7 @@ MODULE_FIRMWARE(FIRMWARE_DCN_36_DMUB); MODULE_FIRMWARE(FIRMWARE_DCN_401_DMUB); MODULE_FIRMWARE(FIRMWARE_DCN_42_DMUB); MODULE_FIRMWARE(FIRMWARE_DCN_42B_DMUB); +MODULE_FIRMWARE(FIRMWARE_DCN_60_DMUB); /** * dm_dmub_aux_setconfig_callback - Callback for AUX or SET_CONFIG command. @@ -408,6 +409,9 @@ STATIC_IFN_KUNIT void *dm_dmub_get_vbios_bounding_box(struct amdgpu_device *adev case IP_VERSION(4, 2, 1): bb_size = sizeof(struct dml2_soc_bb); break; + case IP_VERSION(6, 0, 0): + bb_size = sizeof(struct dmub_soc_bb_params); + break; default: return NULL; } @@ -560,6 +564,9 @@ int dm_dmub_sw_init(struct amdgpu_device *adev) case IP_VERSION(4, 2, 1): dmub_asic = DMUB_ASIC_DCN42B; break; + case IP_VERSION(6, 0, 0): + dmub_asic = DMUB_ASIC_DCN60; + break; default: /* ASIC doesn't support DMUB. */ return 0; @@ -752,6 +759,9 @@ int dm_init_microcode(struct amdgpu_device *adev) case IP_VERSION(4, 2, 1): fw_name_dmub = FIRMWARE_DCN_42B_DMUB; break; + case IP_VERSION(6, 0, 0): + fw_name_dmub = FIRMWARE_DCN_60_DMUB; + break; default: /* ASIC doesn't support DMUB. */ return 0; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.h index c53728d1c131..31d5f8c265c0 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.h @@ -62,6 +62,7 @@ int dm_init_microcode(struct amdgpu_device *adev); #define FIRMWARE_DCN_401_DMUB "amdgpu/dcn_4_0_1_dmcub.bin" #define FIRMWARE_DCN_42_DMUB "amdgpu/dcn_4_2_dmcub.bin" #define FIRMWARE_DCN_42B_DMUB "amdgpu/dcn_4_2_1_dmcub.bin" +#define FIRMWARE_DCN_60_DMUB "amdgpu/dcn_6_0_0_dmcub.bin" #define FIRMWARE_RAVEN_DMCU "amdgpu/raven_dmcu.bin" #define FIRMWARE_NAVI12_DMCU "amdgpu/navi12_dmcu.bin" diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 0c6f0cac666e..824ef3ce5de0 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -144,7 +144,8 @@ void amdgpu_dm_plane_fill_blending_from_plane_state(const struct drm_plane_state * other ASICs use an 8-bit field. The DRM plane alpha is * 16-bit, so scale it down to the width the hardware expects. */ - if (amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(4, 2, 0)) + if (amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(4, 2, 0) + || amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(6, 0, 0)) *global_alpha_value = plane_state->alpha >> 4; else *global_alpha_value = plane_state->alpha >> 8; @@ -316,6 +317,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_validate_dcc(struct amdgpu_device *adev, return 0; if (adev->family != AMDGPU_FAMILY_GC_12_0_0 && + adev->family != AMDGPU_FAMILY_GC_13_0_1 && format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) return -EINVAL; @@ -1047,6 +1049,8 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_get_plane_modifiers(struct amdgpu_device *a amdgpu_dm_plane_add_gfx11_modifiers(adev, mods, &size, &capacity); break; case AMDGPU_FAMILY_GC_12_0_0: + case AMDGPU_FAMILY_GC_13_0_1: + /* GFX13 (DCN6) shares the GFX12 tiling/DCC binary modifier format. */ amdgpu_dm_plane_add_gfx12_modifiers(adev, mods, &size, &capacity); break; } @@ -1187,7 +1191,8 @@ int amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device *adev, upper_32_bits(chroma_addr); } - if (adev->family == AMDGPU_FAMILY_GC_12_0_0) { + if (adev->family == AMDGPU_FAMILY_GC_12_0_0 + || adev->family == AMDGPU_FAMILY_GC_13_0_1) { ret = amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers(adev, afb, format, rotation, plane_size, tiling_info, dcc, diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c index 902f06ac43c6..9ae5cf42754a 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c @@ -86,6 +86,7 @@ bool dal_bios_parser_init_cmd_tbl_helper2( case DCN_VERSION_4_01: case DCN_VERSION_4_2: case DCN_VERSION_4_2B: + case DCN_VERSION_6_0: *h = dal_cmd_tbl_helper_dce112_get_table2(); return true; diff --git a/drivers/gpu/drm/amd/display/include/dal_types.h b/drivers/gpu/drm/amd/display/include/dal_types.h index f77fc367eab1..d67fe0a64418 100644 --- a/drivers/gpu/drm/amd/display/include/dal_types.h +++ b/drivers/gpu/drm/amd/display/include/dal_types.h @@ -67,6 +67,7 @@ enum dce_version { DCN_VERSION_4_01, DCN_VERSION_4_2, DCN_VERSION_4_2B, + DCN_VERSION_6_0, DCN_VERSION_MAX }; -- 2.34.1
