We need to disallow gfxoff if we touch GC MMIO registers. At the moment we use KIQ for TLB flushes so no intended functional change. This just protects the MMIO access if the KIQ is not available.
Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index 633772fa71fda..b036f7fe27b8c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -808,6 +808,10 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, return; } + /* disabllow gfxoff when we invalidate */ + if (vmhub < AMDGPU_MMHUB0(0)) + amdgpu_gfx_off_ctrl(adev, false); + /* This path is needed before KIQ/MES/GFXOFF are set up */ spin_lock(&adev->gmc.invalidate_lock); @@ -873,6 +877,9 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, spin_unlock(&adev->gmc.invalidate_lock); + if (vmhub < AMDGPU_MMHUB0(0)) + amdgpu_gfx_off_ctrl(adev, true); + if (j < adev->usec_timeout) return; -- 2.55.0
