dma_fence_init() now natively allows for selecting 64-bit seqno support. Port all users of dma_fence_init64() to this unified method.
Signed-off-by: Philipp Stanner <[email protected]> --- drivers/dma-buf/dma-fence-chain.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c | 7 ++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 5 +++-- 4 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index a588f55ea4d3..706e1f5e3a23 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -261,8 +261,8 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, seqno = max(prev->seqno, seqno); } - dma_fence_init64(&chain->base, &dma_fence_chain_ops, NULL, - context, seqno); + dma_fence_init(&chain->base, &dma_fence_chain_ops, NULL, + context, seqno, BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* * dma_fence_chain_enable_signaling() is invoked while holding diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c index f6b7522c3c82..1337f7f4195f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c @@ -130,9 +130,10 @@ int amdgpu_evf_mgr_rearm(struct amdgpu_eviction_fence_mgr *evf_mgr, ev_fence->evf_mgr = evf_mgr; get_task_comm(ev_fence->timeline_name, current); spin_lock_init(&ev_fence->lock); - dma_fence_init64(&ev_fence->base, &amdgpu_eviction_fence_ops, - &ev_fence->lock, evf_mgr->ev_fence_ctx, - atomic_inc_return(&evf_mgr->ev_fence_seq)); + dma_fence_init(&ev_fence->base, &amdgpu_eviction_fence_ops, + &ev_fence->lock, evf_mgr->ev_fence_ctx, + atomic_inc_return(&evf_mgr->ev_fence_seq), + BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* Remember it for newly added BOs */ dma_fence_put(evf_mgr->ev_fence); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c index 6f1dc813ec5b..199cc1835448 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c @@ -274,8 +274,9 @@ static void amdgpu_userq_fence_init(struct amdgpu_usermode_queue *userq, bool signaled = false; spin_lock_init(&fence->lock); - dma_fence_init64(&fence->base, &amdgpu_userq_fence_ops, &fence->lock, - fence_drv->context, seq); + dma_fence_init(&fence->base, &amdgpu_userq_fence_ops, &fence->lock, + fence_drv->context, seq, + BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* Make sure the fence is visible to the hang detect worker */ dma_fence_put(userq->last_fence); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c index b0002c898386..8b9b9368956f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c @@ -100,8 +100,9 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vm INIT_WORK(&f->work, amdgpu_tlb_fence_work); spin_lock_init(&f->lock); - dma_fence_init64(&f->base, &amdgpu_tlb_fence_ops, &f->lock, - vm->tlb_fence_context, atomic64_read(&vm->tlb_seq)); + dma_fence_init(&f->base, &amdgpu_tlb_fence_ops, &f->lock, + vm->tlb_fence_context, atomic64_read(&vm->tlb_seq), + BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* TODO: We probably need a separate wq here */ dma_fence_get(&f->base); -- 2.56.0
