From: James Lin <[email protected]>
drm_mode_config_validate() warns when a plane exposes an alpha-capable
pixel format without a blend_mode_property. amdgpu DM only created that
property for overlay planes, so PRIMARY and CURSOR triggered the warning
on every probe and reload in kernel 7.2.
Create the blend mode property for every plane that advertises an alpha
format. Keep overlay-only alpha_property. Cursor advertises only
pre-multiplied blend mode because native cursor programming is
pre-multiplied.
This re-applies commit 3f3139234c28 ("drm/amd/display: Attach blend mode
property for alpha planes"), which was reverted by
commit 07df8cb29c8b ("Revert \"drm/amd/display: Attach blend mode property for
alpha planes\"").
As that revert log states, it "regresses blend mode handling due to
conflicts in drm-next" - i.e. it was a mechanical conflict resolution
during a drm-next backmerge, not a defect in the fix, and it was never
re-applied. The plane registration code therefore still matches the
pre-fix state and the warning persists, so re-apply the original, reviewed
change.
Signed-off-by: James Lin <[email protected]>
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 38 +++++++++++++++----
1 file changed, 31 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 06d9ff2c32c5..d6a51303ffb8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -2204,6 +2204,21 @@ static const struct drm_plane_funcs dm_plane_funcs = {
#endif
};
+static bool amdgpu_dm_plane_exposes_alpha_format(const struct drm_plane *plane)
+{
+ unsigned int i;
+
+ for (i = 0; i < plane->format_count; i++) {
+ const struct drm_format_info *fmt =
+ drm_format_info(plane->format_types[i]);
+
+ if (fmt && fmt->has_alpha)
+ return true;
+ }
+
+ return false;
+}
+
int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
struct drm_plane *plane,
unsigned long possible_crtcs,
@@ -2234,14 +2249,8 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager
*dm,
return res;
if (plane->type == DRM_PLANE_TYPE_OVERLAY &&
- plane_cap && plane_cap->per_pixel_alpha) {
- unsigned int blend_caps = BIT(DRM_MODE_BLEND_PIXEL_NONE) |
- BIT(DRM_MODE_BLEND_PREMULTI) |
- BIT(DRM_MODE_BLEND_COVERAGE);
-
+ plane_cap && plane_cap->per_pixel_alpha)
drm_plane_create_alpha_property(plane);
- drm_plane_create_blend_mode_property(plane, blend_caps);
- }
if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
/*
@@ -2261,6 +2270,21 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager
*dm,
drm_plane_create_zpos_immutable_property(plane, 255);
}
+ /*
+ * drm_mode_config_validate() warns about planes exposing a pixel format
+ * with alpha but no blend mode property, so attach one to every plane
+ * advertising such a format.
+ */
+ if (amdgpu_dm_plane_exposes_alpha_format(plane)) {
+ unsigned int blend_caps = BIT(DRM_MODE_BLEND_PREMULTI);
+
+ if (plane->type != DRM_PLANE_TYPE_CURSOR)
+ blend_caps |= BIT(DRM_MODE_BLEND_PIXEL_NONE) |
+ BIT(DRM_MODE_BLEND_COVERAGE);
+
+ drm_plane_create_blend_mode_property(plane, blend_caps);
+ }
+
if ((plane->type == DRM_PLANE_TYPE_PRIMARY ||
plane->type == DRM_PLANE_TYPE_OVERLAY) &&
plane_cap &&
--
2.43.0
