The check should be moved up into late_init where the call to ecc_available is
and we should make it explicit since only vega10 supports it, that way we don't
get any false messages from RV. How about the attached patch?
Alex
________________________________
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of Junwei Zhang
<jerry.zh...@amd.com>
Sent: Wednesday, January 17, 2018 2:02 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Jerry
Subject: [PATCH] drm/amdgpu: disable ECC check for Raven to avoid error message
annoyance
It should be enabled until ECC is supported for Raven.
Change-Id: If847663d503c26d2a08274ca721b4ce1bc637111
Signed-off-by: Junwei Zhang <jerry.zh...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index c12ee75..a333442 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -533,6 +533,10 @@ static int gmc_v9_0_ecc_available(struct amdgpu_device
*adev)
DRM_DEBUG("ecc: gmc_v9_0_ecc_available()\n");
+ /* Temporally skip ECC for Raven to avoid error message annoyance */
+ if (adev->asic_type == CHIP_RAVEN)
+ return 0;
+
lost_sheep = 0;
for (i = 0; i < ARRAY_SIZE(ecc_umclocalcap_addrs); ++i) {
reg_addr = ecc_umclocalcap_addrs[i];
--
1.9.1
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From 6f8ac365d0face24876aa18cf9dfa1c893066556 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deuc...@amd.com>
Date: Wed, 17 Jan 2018 09:07:29 -0500
Subject: [PATCH] drm/amdgpu: only check for ECC on Vega10
RV doesn't support it.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index b7e3a4dc952c..36e3d864df77 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -629,14 +629,16 @@ static int gmc_v9_0_late_init(void *handle)
for(i = 0; i < AMDGPU_MAX_VMHUBS; ++i)
BUG_ON(vm_inv_eng[i] > 16);
- r = gmc_v9_0_ecc_available(adev);
- if (r == 1) {
- DRM_INFO("ECC is active.\n");
- } else if (r == 0) {
- DRM_INFO("ECC is not present.\n");
- } else {
- DRM_ERROR("gmc_v9_0_ecc_available() failed. r: %d\n", r);
- return r;
+ if (adev->asic_type == CHIP_VEGA10) {
+ r = gmc_v9_0_ecc_available(adev);
+ if (r == 1) {
+ DRM_INFO("ECC is active.\n");
+ } else if (r == 0) {
+ DRM_INFO("ECC is not present.\n");
+ } else {
+ DRM_ERROR("gmc_v9_0_ecc_available() failed. r: %d\n", r);
+ return r;
+ }
}
return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);
--
2.13.6
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