Am 18.04.2018 um 18:21 schrieb Samuel Li:

On 2018-04-18 12:16 PM, Christian König wrote:
Am 18.04.2018 um 17:29 schrieb Samuel Li:
On 2018-04-18 12:14 AM, Alex Deucher wrote:
On Tue, Apr 17, 2018 at 8:40 PM, Samuel Li <samuel...@amd.com> wrote:
It's auto by default. For CZ/ST, auto setting enables sg display
when vram size is small; otherwise still uses vram.
This patch fixed some potention hang issue introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
limitation.

OK.

[...]

Mhm, for developer testing we can easily modify 
amdgpu_display_supported_domains().

The real question is should we give an end user the ability to modify the 
behavior? I currently can't think of a reason for that.
Yes, we do. For example, there are cases that user prefers GTT(VRAM can run 
out), also there are cases user prefers VRAM for performance.

Yeah, but that is exactly the reason why Alex and I wanted to take preferred_domains into account here, so that we can let userspace control this behavior.

Regards,
Christian.


Regards,
Sam


Regards,
Christian.

Regards,
Samuel Li

Alex

+       }
+#endif

          if (bo->pin_count) {
                  uint32_t mem_type = bo->tbo.mem.mem_type;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index 4b584cb7..cf0749f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -209,7 +209,7 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf 
*dma_buf,
          struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
          struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
          struct ttm_operation_ctx ctx = { true, false };
-       u32 domain = amdgpu_display_framebuffer_domains(adev);
+       u32 domain = amdgpu_display_supported_domains(adev);
          int ret;
          bool reads = (direction == DMA_BIDIRECTIONAL ||
                        direction == DMA_FROM_DEVICE);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 6f92a19..1f5603a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3109,12 +3109,11 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
                  return r;

          if (plane->type != DRM_PLANE_TYPE_CURSOR)
-               domain = amdgpu_display_framebuffer_domains(adev);
+               domain = amdgpu_display_supported_domains(adev);
          else
                  domain = AMDGPU_GEM_DOMAIN_VRAM;

          r = amdgpu_bo_pin(rbo, domain, &afb->address);
-
          amdgpu_bo_unreserve(rbo);

          if (unlikely(r != 0)) {
--
2.7.4

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