Do we need to maintain the uvd/vce pg state in pp?
uvd/vce have maintained the pg state by themselves.
pp only provide an interface for uvd/vce/gfx/mmhub to power up/down the ip
through smu if smu supported, concurrently enable/disable uvd/vce/mmhub dpm
feature.
Best Regards
Rex
________________________________
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of Alex Deucher
<alexdeuc...@gmail.com>
Sent: Thursday, June 28, 2018 11:31 PM
To: Quan, Evan
Cc: amd-gfx list
Subject: Re: [PATCH] drm/amd/powerplay: initialize uvd/vce powergate status v3
On Wed, Jun 20, 2018 at 2:40 AM, Evan Quan <evan.q...@amd.com> wrote:
> On UVD/VCE dpm enabled/disabled, the powergate status will be
> set as false/true. So that we will not try to ungate/gate them(
> enable/disable their dpm) again.
>
> v2: added check for uvd/vce powergate status before gating
> v3: fix typo in description
>
> Change-Id: I569a5aa216b5e7d64a2b504f2ff98cc83ca802d5
> Signed-off-by: Evan Quan <evan.q...@amd.com>
Does vega10 need a similar fix?
Alex
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 23
> ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> index 45c8f2d..28b172e 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> @@ -777,6 +777,21 @@ static int vega12_set_allowed_featuresmask(struct
> pp_hwmgr *hwmgr)
> return 0;
> }
>
> +static void vega12_init_powergate_state(struct pp_hwmgr *hwmgr)
> +{
> + struct vega12_hwmgr *data =
> + (struct vega12_hwmgr *)(hwmgr->backend);
> +
> + data->uvd_power_gated = true;
> + data->vce_power_gated = true;
> +
> + if (data->smu_features[GNLD_DPM_UVD].enabled)
> + data->uvd_power_gated = false;
> +
> + if (data->smu_features[GNLD_DPM_VCE].enabled)
> + data->vce_power_gated = false;
> +}
> +
> static int vega12_enable_all_smu_features(struct pp_hwmgr *hwmgr)
> {
> struct vega12_hwmgr *data =
> @@ -801,6 +816,8 @@ static int vega12_enable_all_smu_features(struct pp_hwmgr
> *hwmgr)
> }
> }
>
> + vega12_init_powergate_state(hwmgr);
> +
> return 0;
> }
>
> @@ -1985,6 +2002,9 @@ static void vega12_power_gate_vce(struct pp_hwmgr
> *hwmgr, bool bgate)
> {
> struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
>
> + if (data->vce_power_gated == bgate)
> + return 0;
> +
> data->vce_power_gated = bgate;
> vega12_enable_disable_vce_dpm(hwmgr, !bgate);
> }
> @@ -1993,6 +2013,9 @@ static void vega12_power_gate_uvd(struct pp_hwmgr
> *hwmgr, bool bgate)
> {
> struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
>
> + if (data->uvd_power_gated == bgate)
> + return 0;
> +
> data->uvd_power_gated = bgate;
> vega12_enable_disable_uvd_dpm(hwmgr, !bgate);
> }
> --
> 2.7.4
>
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