On 08/24/2018 10:20 PM, Christian König wrote:
Helper to get the PDE for a PD/PT.

Signed-off-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Junwei Zhang <jerry.zh...@amd.com>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 37 +++++++++++++++++++++++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 21 ++++++++++++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h |  1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  |  4 +--
  5 files changed, 57 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 36058feac64f..6f79ce108728 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -26,6 +26,38 @@

  #include "amdgpu.h"

+/**
+ * amdgpu_gmc_get_pde_for_bo - get the PDE for a BO
+ *
+ * @bo: the BO to get the PDE for
+ * @level: the level in the PD hirarchy
+ * @addr: resulting addr
+ * @flags: resulting flags
+ *
+ * Get the address and flags to be used for a PDE.
+ */
+void amdgpu_gmc_get_pde_for_bo(struct amdgpu_bo *bo, int level,
+                              uint64_t *addr, uint64_t *flags)
+{
+       struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+       struct ttm_dma_tt *ttm;
+
+       switch (bo->tbo.mem.mem_type) {
+       case TTM_PL_TT:
+               ttm = container_of(bo->tbo.ttm, struct ttm_dma_tt, ttm);
+               *addr = ttm->dma_address[0];
+               break;
+       case TTM_PL_VRAM:
+               *addr = amdgpu_bo_gpu_offset(bo);
+               break;
+       default:
+               *addr = 0;
+               break;
+       }
+       *flags = amdgpu_ttm_tt_pde_flags(bo->tbo.ttm, &bo->tbo.mem);
+       amdgpu_gmc_get_vm_pde(adev, level, addr, flags);
+}
+
  /**
   * amdgpu_gmc_pd_addr - return the address of the root directory
   *
@@ -35,13 +67,14 @@ uint64_t amdgpu_gmc_pd_addr(struct amdgpu_bo *bo)
        struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
        uint64_t pd_addr;

-       pd_addr = amdgpu_bo_gpu_offset(bo);
        /* TODO: move that into ASIC specific code */
        if (adev->asic_type >= CHIP_VEGA10) {
                uint64_t flags = AMDGPU_PTE_VALID;

-               amdgpu_gmc_get_vm_pde(adev, -1, &pd_addr, &flags);
+               amdgpu_gmc_get_pde_for_bo(bo, -1, &pd_addr, &flags);
                pd_addr |= flags;
+       } else {
+               pd_addr = amdgpu_bo_gpu_offset(bo);
        }
        return pd_addr;
  }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 7c469cce0498..0d2c9f65ca13 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -131,6 +131,8 @@ static inline bool amdgpu_gmc_vram_full_visible(struct 
amdgpu_gmc *gmc)
        return (gmc->real_vram_size == gmc->visible_vram_size);
  }

+void amdgpu_gmc_get_pde_for_bo(struct amdgpu_bo *bo, int level,
+                              uint64_t *addr, uint64_t *flags);
  uint64_t amdgpu_gmc_pd_addr(struct amdgpu_bo *bo);

  #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index eb08a03b82a0..72366643e3c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1428,13 +1428,14 @@ bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm)
  }

  /**
- * amdgpu_ttm_tt_pte_flags - Compute PTE flags for ttm_tt object
+ * amdgpu_ttm_tt_pde_flags - Compute PDE flags for ttm_tt object
   *
   * @ttm: The ttm_tt object to compute the flags for
   * @mem: The memory registry backing this ttm_tt object
+ *
+ * Figure out the flags to use for a VM PDE.
   */
-uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt 
*ttm,
-                                struct ttm_mem_reg *mem)
+uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
  {
        uint64_t flags = 0;

@@ -1448,6 +1449,20 @@ uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device 
*adev, struct ttm_tt *ttm,
                        flags |= AMDGPU_PTE_SNOOPED;
        }

+       return flags;
+}
+
+/**
+ * amdgpu_ttm_tt_pte_flags - Compute PTE flags for ttm_tt object
+ *
+ * @ttm: The ttm_tt object to compute the flags for
+ * @mem: The memory registry backing this ttm_tt object
+ */
+uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt 
*ttm,
+                                struct ttm_mem_reg *mem)
+{
+       uint64_t flags = amdgpu_ttm_tt_pde_flags(ttm, mem);
+
        flags |= adev->gart.gart_pte_flags;
        flags |= AMDGPU_PTE_READABLE;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 8b3cc6687769..fe8f276e9811 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -116,6 +116,7 @@ bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
                                       int *last_invalidated);
  bool amdgpu_ttm_tt_userptr_needs_pages(struct ttm_tt *ttm);
  bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
+uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_mem_reg *mem);
  uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt 
*ttm,
                                 struct ttm_mem_reg *mem);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index d7ecbeb2f8a4..c951ebeac5fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -992,9 +992,7 @@ static void amdgpu_vm_update_pde(struct 
amdgpu_pte_update_params *params,
                pbo = pbo->parent;

        level += params->adev->vm_manager.root_level;
-       pt = amdgpu_bo_gpu_offset(entry->base.bo);
-       flags = AMDGPU_PTE_VALID;
-       amdgpu_gmc_get_vm_pde(params->adev, level, &pt, &flags);
+       amdgpu_gmc_get_pde_for_bo(entry->base.bo, level, &pt, &flags);
        pde = (entry - parent->entries) * 8;
        if (bo->shadow)
                params->func(params, bo->shadow, pde, pt, 1, 0, flags);

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to