From: Shaoyun Liu <shaoyun....@amd.com>

Place holder for XGMI support

Change-Id: I924fa3693366409de0218009c7f709cb464854cc
Signed-off-by: Shaoyun Liu <shaoyun....@amd.com>
Reviewed-by: Huang Rui <ray.hu...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 34 +++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index 981887c..8b8720e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -35,6 +35,7 @@
 #define PSP_TMR_SIZE   0x400000
 
 struct psp_context;
+struct psp_xgmi_topology_info;
 
 enum psp_ring_type
 {
@@ -79,6 +80,12 @@ struct psp_funcs
                                  enum AMDGPU_UCODE_ID ucode_type);
        bool (*smu_reload_quirk)(struct psp_context *psp);
        int (*mode1_reset)(struct psp_context *psp);
+       uint64_t (*xgmi_get_device_id)(struct psp_context *psp);
+       uint64_t (*xgmi_get_hive_id)(struct psp_context *psp);
+       int (*xgmi_get_topology_info)(struct psp_context *psp, int 
number_devices,
+                       struct psp_xgmi_topology_info *topology);
+       int (*xgmi_set_topology_info)(struct psp_context *psp, int 
number_devices,
+                       struct psp_xgmi_topology_info *topology);
 };
 
 struct psp_context
@@ -134,6 +141,23 @@ struct amdgpu_psp_funcs {
                                        enum AMDGPU_UCODE_ID);
 };
 
+struct psp_xgmi_topology_info {
+       /* Generated by PSP to identify the GPU instance within xgmi connection 
*/
+       uint64_t                        device_id;
+       /*
+        * If all bits set to 0 , driver indicates it wants to retrieve the xgmi
+        * connection vector topology, but not access enable the connections
+        * if some or all bits are set to 1, driver indicates it want to 
retrieve the
+        * current xgmi topology and  access enable the link to GPU[i] 
associated
+        * with the bit position in the  vector.
+        * On return,: bits indicated which xgmi links are present/active 
depending
+        * on the  value passed in. The relative bit offset for the  relative 
GPU index
+        * within the  hive is always marked active.
+        */
+       uint32_t                        connection_mask;
+       uint32_t                        reserved; /* must be  0 */
+};
+
 #define psp_prep_cmd_buf(ucode, type) (psp)->funcs->prep_cmd_buf((ucode), 
(type))
 #define psp_ring_init(psp, type) (psp)->funcs->ring_init((psp), (type))
 #define psp_ring_create(psp, type) (psp)->funcs->ring_create((psp), (type))
@@ -153,6 +177,16 @@ struct amdgpu_psp_funcs {
                ((psp)->funcs->smu_reload_quirk ? 
(psp)->funcs->smu_reload_quirk((psp)) : false)
 #define psp_mode1_reset(psp) \
                ((psp)->funcs->mode1_reset ? (psp)->funcs->mode1_reset((psp)) : 
false)
+#define psp_xgmi_get_device_id(psp) \
+               ((psp)->funcs->xgmi_get_device_id ? 
(psp)->funcs->xgmi_get_device_id((psp)) : 0)
+#define psp_xgmi_get_hive_id(psp) \
+               ((psp)->funcs->xgmi_get_hive_id ? 
(psp)->funcs->xgmi_get_hive_id((psp)) : 0)
+#define psp_xgmi_get_topology_info(psp, num_device, topology) \
+               ((psp)->funcs->xgmi_get_topology_info ? \
+               (psp)->funcs->xgmi_get_topology_info((psp), (num_device), 
(topology)) : -EINVAL)
+#define psp_xgmi_set_topology_info(psp, num_device, topology) \
+               ((psp)->funcs->xgmi_set_topology_info ?  \
+               (psp)->funcs->xgmi_set_topology_info((psp), (num_device), 
(topology)) : -EINVAL)
 
 #define amdgpu_psp_check_fw_loading_status(adev, i) 
(adev)->firmware.funcs->check_fw_loading_status((adev), (i))
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to