Thanks for keeping working on this.
Series is Reviewed-by: Christian König <christian.koe...@amd.com> as well.
Do you now have commit rights?
Christian.
Am 02.10.2018 um 22:47 schrieb Marek Olšák:
For the series:
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Marek
On Fri, Sep 28, 2018 at 10:46 AM Andrey Grodzovsky
<andrey.grodzov...@amd.com> wrote:
Seems like AI and RV requires uncashed memory mapping to be able
to pickup value written to memory by CPU after the WAIT_REG_MEM
command was already launched.
.
Enable the test for AI and RV.
v2:
Update commit description.
Signed-off-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
---
tests/amdgpu/deadlock_tests.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/tests/amdgpu/deadlock_tests.c b/tests/amdgpu/deadlock_tests.c
index 304482d..292ec4e 100644
--- a/tests/amdgpu/deadlock_tests.c
+++ b/tests/amdgpu/deadlock_tests.c
@@ -80,6 +80,8 @@ static uint32_t minor_version;
static pthread_t stress_thread;
static uint32_t *ptr;
+int use_uc_mtype = 0;
+
static void amdgpu_deadlock_helper(unsigned ip_type);
static void amdgpu_deadlock_gfx(void);
static void amdgpu_deadlock_compute(void);
@@ -92,13 +94,14 @@ CU_BOOL suite_deadlock_tests_enable(void)
&minor_version, &device_handle))
return CU_FALSE;
- if (device_handle->info.family_id == AMDGPU_FAMILY_AI ||
- device_handle->info.family_id == AMDGPU_FAMILY_SI ||
- device_handle->info.family_id == AMDGPU_FAMILY_RV) {
+ if (device_handle->info.family_id == AMDGPU_FAMILY_SI) {
printf("\n\nCurrently hangs the CP on this ASIC, deadlock suite
disabled\n");
enable = CU_FALSE;
}
+ if (device_handle->info.family_id >= AMDGPU_FAMILY_AI)
+ use_uc_mtype = 1;
+
if (amdgpu_device_deinitialize(device_handle))
return CU_FALSE;
@@ -183,8 +186,8 @@ static void amdgpu_deadlock_helper(unsigned ip_type)
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
CU_ASSERT_EQUAL(r, 0);
- r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
- AMDGPU_GEM_DOMAIN_GTT, 0,
+ r = amdgpu_bo_alloc_and_map_raw(device_handle, 4096, 4096,
+ AMDGPU_GEM_DOMAIN_GTT, 0, use_uc_mtype ?
AMDGPU_VM_MTYPE_UC : 0,
&ib_result_handle,
&ib_result_cpu,
&ib_result_mc_address,
&va_handle);
CU_ASSERT_EQUAL(r, 0);
--
2.7.4
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