[PATCH 7/8] drm/amdgpu: expose gmc_v9_0_flush_gpu_tlb_helper() for kfd to use

[Zhao, Yong]

Change-Id: I3dcd71955297c53b181f82e7078981230c642c01
Signed-off-by: Yong Zhao <yong.z...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  3 +++
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 19 ++++++++++++++-----
 2 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 8f81dfd..98e7b4b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1275,5 +1275,8 @@ void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device 
*adev, uint32_t vmid,
 void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
                                uint64_t value);
 
+void gmc_v9_0_flush_gpu_tlb_helper(struct amdgpu_device *adev, uint32_t vmid,
+                               uint32_t flush_type, uint32_t eng);
+
 #include "amdgpu_object.h"
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index f35d7a5..42d93d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -293,14 +293,15 @@ static void gmc_v9_0_set_irq_funcs(struct amdgpu_device 
*adev)
        adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs;
 }
 
-static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid)
+static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid,
+                                       uint32_t flush_type)
 {
        u32 req = 0;
 
        /* invalidate using legacy mode on vmid*/
        req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
                            PER_VMID_INVALIDATE_REQ, 1 << vmid);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 
flush_type);
        req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);
        req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);
        req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);
@@ -372,14 +373,22 @@ static signed long  amdgpu_kiq_reg_write_reg_wait(struct 
amdgpu_device *adev,
 static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev,
                                        uint32_t vmid)
 {
+       spin_lock(&adev->gmc.invalidate_lock);
        /* Use register 17 for GART */
-       const unsigned eng = 17;
+       gmc_v9_0_flush_gpu_tlb_helper(adev, vmid, 0, 17);
+
+       spin_unlock(&adev->gmc.invalidate_lock);
+}
+
+void gmc_v9_0_flush_gpu_tlb_helper(struct amdgpu_device *adev, uint32_t vmid,
+                               uint32_t flush_type, uint32_t eng)
+{
        unsigned i, j;
        int r;
 
        for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
                struct amdgpu_vmhub *hub = &adev->vmhub[i];
-               u32 tmp = gmc_v9_0_get_invalidate_req(vmid);
+               u32 tmp = gmc_v9_0_get_invalidate_req(vmid, flush_type);
 
                if (adev->gfx.kiq.ring.ready &&
                    (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) &&
@@ -429,7 +438,7 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct 
amdgpu_ring *ring,
 {
        struct amdgpu_device *adev = ring->adev;
        struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub];
-       uint32_t req = gmc_v9_0_get_invalidate_req(vmid);
+       uint32_t req = gmc_v9_0_get_invalidate_req(vmid, 0);
        unsigned eng = ring->vm_inv_eng;
 
        amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + (2 * vmid),
-- 
2.7.4

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