On Wed, Nov 13, 2019 at 9:57 AM Hawking Zhang <hawking.zh...@amd.com> wrote:
>
> reuse vg20 umc functions for arcturus umc ras
>
> Change-Id: Ia8af3c20a717c76ec18aa5fa332cfd81ca60ff69
> Signed-off-by: Hawking Zhang <hawking.zh...@amd.com>
Series is:
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 3784b62201b0..8a5b722ce5b7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -635,6 +635,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device
> *adev)
> adev->umc.funcs = &umc_v6_0_funcs;
> break;
> case CHIP_VEGA20:
> + case CHIP_ARCTURUS:
> adev->umc.max_ras_err_cnt_per_query =
> UMC_V6_1_TOTAL_CHANNEL_NUM;
> adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
> adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM;
> @@ -748,6 +749,7 @@ static int gmc_v9_0_late_init(void *handle)
> switch (adev->asic_type) {
> case CHIP_VEGA10:
> case CHIP_VEGA20:
> + case CHIP_ARCTURUS:
> r = amdgpu_atomfirmware_mem_ecc_supported(adev);
> if (!r) {
> DRM_INFO("ECC is not present.\n");
> --
> 2.17.1
>
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