Reviewed-by: Evan Quan <evan.q...@amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, January 29, 2020 3:47 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <alexander.deuc...@amd.com>
Subject: [PATCH 2/2] drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency

Only send non-0 clocks to DC for validation.  This mirrors what the windows 
driver does.

Bug: 
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2Fissues%2F963&amp;data=02%7C01%7Cevan.quan%40amd.com%7C201c9325bf144200f84208d7a42ae179%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637158377025664935&amp;sdata=n61wTpS6nqQjPoeM4gDHg9fu79rQIBgtOir%2B%2FJzvj5E%3D&amp;reserved=0
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index 4e8ab139bb3b..273126cfc37d 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -1026,12 +1026,15 @@ static int smu10_get_clock_by_type_with_latency(struct 
pp_hwmgr *hwmgr,
 
        clocks->num_levels = 0;
        for (i = 0; i < pclk_vol_table->count; i++) {
-               clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk 
* 10;
-               clocks->data[i].latency_in_us = latency_required ?
-                                               smu10_get_mem_latency(hwmgr,
-                                               pclk_vol_table->entries[i].clk) 
:
-                                               0;
-               clocks->num_levels++;
+               if (pclk_vol_table->entries[i].clk) {
+                       clocks->data[clocks->num_levels].clocks_in_khz =
+                               pclk_vol_table->entries[i].clk * 10;
+                       clocks->data[clocks->num_levels].latency_in_us = 
latency_required ?
+                               smu10_get_mem_latency(hwmgr,
+                                                     
pclk_vol_table->entries[i].clk) :
+                               0;
+                       clocks->num_levels++;
+               }
        }
 
        return 0;
--
2.24.1

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