[AMD Public Use]
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
________________________________
From: Andrey Grodzovsky <andrey.grodzov...@amd.com>
Sent: Wednesday, March 4, 2020 1:08 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Grodzovsky, Andrey
<andrey.grodzov...@amd.com>
Subject: [PATCH] drm/amdgpu: Wrap clflush_cache_range with x86 ifdef
To avoid compile errors on other platforms.
Signed-off-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index cff0fd2..3836acc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1883,8 +1883,15 @@ static ssize_t psp_usbc_pd_fw_sysfs_write(struct device
*dev,
memcpy_toio(cpu_addr, usbc_pd_fw->data, usbc_pd_fw->size);
- /*TODO Remove once PSP starts snooping CPU cache */
+ /*
+ * x86 specific workaround.
+ * Without it the buffer is invisible in PSP.
+ *
+ * TODO Remove once PSP starts snooping CPU cache
+ */
+#ifdef CONFIG_X86
clflush_cache_range(cpu_addr, (usbc_pd_fw->size & ~(L1_CACHE_BYTES -
1)));
+#endif
mutex_lock(&adev->psp.mutex);
ret = psp_load_usbc_pd_fw(&adev->psp, dma_addr);
--
2.7.4
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