[AMD Official Use Only - Internal Distribution Only]
On Wed, Apr 01, 2020 at 07:41:12PM +0800, Yuxian Dai wrote:
> 1.Using the FCLK DPM table to set the MCLK for DPM states consist of
> three entities:
> FCLK
> UCLK
> MEMCLK
> All these three clk change together, MEMCLK from FCLK, so use the fclk
> frequency.
> 2.we should show the current working clock freqency from clock table
> metric
>
> Signed-off-by: Yuxian Dai <yuxian....@amd.com>
> Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> Reviewed-by: Huang Rui <ray.hu...@amd.com>
> Reviewed-by: Kevin Wang <kevin1.w...@amd.com>
> ---
Next time, if you submit the V2 patch, you can generate it as below
command:
git format-patch --subject-prefix="PATCH v2"
And describe the changes from v1 -> v2 in the commit message. This will help
everyone to understand your change.
> I got it.
Reviewed-by: Huang Rui <ray.hu...@amd.com>
> drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 6 ++++++
> drivers/gpu/drm/amd/powerplay/renoir_ppt.h | 2 +-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
> b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
> index 7bf52ecba01d..c6b39a7026a8 100644
> --- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
> @@ -239,6 +239,7 @@ static int renoir_print_clk_levels(struct smu_context
> *smu,
> uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;
> DpmClocks_t *clk_table = smu->smu_table.clocks_table;
> SmuMetrics_t metrics;
> + bool cur_value_match_level = false;
>
> if (!clk_table || clk_type >= SMU_CLK_COUNT)
> return -EINVAL;
> @@ -297,8 +298,13 @@ static int renoir_print_clk_levels(struct smu_context
> *smu,
> GET_DPM_CUR_FREQ(clk_table, clk_type, i, value);
> size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,
> cur_value == value ? "*" : "");
> + if (cur_value == value)
> + cur_value_match_level = true;
> }
>
> + if (!cur_value_match_level)
> + size += sprintf(buf + size, " %uMhz *\n", cur_value);
> +
> return size;
> }
>
> diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
> b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
> index 2a390ddd37dd..89cd6da118a3 100644
> --- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
> +++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
> @@ -37,7 +37,7 @@ extern void renoir_set_ppt_funcs(struct smu_context *smu);
> freq = table->SocClocks[dpm_level].Freq; \
> break; \
> case SMU_MCLK: \
> - freq = table->MemClocks[dpm_level].Freq; \
> + freq = table->FClocks[dpm_level].Freq; \
> break; \
> case SMU_DCEFCLK: \
> freq = table->DcfClocks[dpm_level].Freq; \
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cra
> y.huang%40amd.com%7Cfa81baf94d2c409e4f0308d7d6319a8f%7C3dd8961fe4884e6
> 08e11a82d994e183d%7C0%7C0%7C637213381443101089&sdata=LF2pLZj%2Fq0C
> wiMSfvDiofXFKuGVfgje7o4Iti%2FtoNj0%3D&reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
