From: Stylon Wang <stylon.w...@amd.com>
[Why]
Commit 4ca3f1217e6106779aea9ebabdd09f695d42f2ff is causing regression
from changing the order of call sequence.
[How]
Keep the call sequence and take in extra dm state only if plane-level
color management is enabled.
Signed-off-by: Stylon Wang <stylon.w...@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 ++++++++++---------
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 3 +--
3 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 671741713b04..209b9bf8bf11 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3778,12 +3778,11 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
}
static int fill_dc_plane_attributes(struct amdgpu_device *adev,
- struct dm_plane_state *dm_plane_state,
+ struct dc_plane_state *dc_plane_state,
struct drm_plane_state *plane_state,
struct drm_crtc_state *crtc_state)
{
struct dm_crtc_state *dm_crtc_state = to_dm_crtc_state(crtc_state);
- struct dc_plane_state *dc_plane_state = dm_plane_state->dc_state;
const struct amdgpu_framebuffer *amdgpu_fb =
to_amdgpu_framebuffer(plane_state->fb);
struct dc_scaling_info scaling_info;
@@ -3831,7 +3830,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device
*adev,
* Always set input transfer function, since plane state is refreshed
* every time.
*/
- ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dm_plane_state);
+ ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dc_plane_state);
if (ret)
return ret;
@@ -8037,6 +8036,16 @@ static int dm_update_plane_state(struct dc *dc,
DRM_DEBUG_DRIVER("Enabling DRM plane: %d on DRM crtc %d\n",
plane->base.id, new_plane_crtc->base.id);
+ ret = fill_dc_plane_attributes(
+ new_plane_crtc->dev->dev_private,
+ dc_new_plane_state,
+ new_plane_state,
+ new_crtc_state);
+ if (ret) {
+ dc_plane_state_release(dc_new_plane_state);
+ return ret;
+ }
+
ret = dm_atomic_get_state(state, &dm_state);
if (ret) {
dc_plane_state_release(dc_new_plane_state);
@@ -8062,14 +8071,6 @@ static int dm_update_plane_state(struct dc *dc,
dm_new_plane_state->dc_state = dc_new_plane_state;
- ret = fill_dc_plane_attributes(
- new_plane_crtc->dev->dev_private,
- dm_new_plane_state,
- new_plane_state,
- new_crtc_state);
- if (ret)
- return ret;
-
/* Tell DC to do a full surface update every time there
* is a plane change. Inefficient, but works for now.
*/
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index f30dc004bf2b..3f0c6298b588 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -482,7 +482,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector
*connector,
void amdgpu_dm_init_color_mod(void);
int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc);
int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
- struct dm_plane_state *plane);
+ struct dc_plane_state *dc_plane_state);
void amdgpu_dm_update_connector_after_detect(
struct amdgpu_dm_connector *aconnector);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index d0554082f0dc..838f35668f12 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -416,10 +416,9 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state
*crtc)
* Returns 0 on success.
*/
int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
- struct dm_plane_state *plane)
+ struct dc_plane_state *dc_plane_state)
{
const struct drm_color_lut *degamma_lut;
- struct dc_plane_state *dc_plane_state = plane->dc_state;
enum dc_transfer_func_predefined tf = TRANSFER_FUNCTION_SRGB;
uint32_t degamma_size;
int r;
--
2.26.0
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