From: Harmanprit Tatla <harmanprit.ta...@amd.com> [Why] Currently clearing the wrong bit for CP_IRQ, and logic on when to clear needs to be fixed.
[How] Corrected bit to clear and improved logic for decision to clear. Signed-off-by: Harmanprit Tatla <harmanprit.ta...@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pil...@amd.com> --- drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c | 3 +-- .../gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c | 16 +++++++--------- 2 files changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c index a82975970e87..20e554e771d1 100644 --- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c +++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c @@ -472,8 +472,7 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp *hdcp, } /* Clear CP_IRQ status if needed */ - if (event_ctx.event == MOD_HDCP_EVENT_CPIRQ && - event_ctx.unexpected_event == 0) { + if (event_ctx.event == MOD_HDCP_EVENT_CPIRQ) { status = mod_hdcp_clear_cp_irq_status(hdcp); if (status != MOD_HDCP_STATUS_SUCCESS) push_error_status(hdcp, status); diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c index 9dd8c854fd81..f7b5583ee609 100644 --- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c +++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c @@ -30,6 +30,8 @@ #define KSV_READ_SIZE 0xf /* 0x6803b - 0x6802c */ #define HDCP_MAX_AUX_TRANSACTION_SIZE 16 +#define DP_CP_IRQ (1 << 2) + enum mod_hdcp_ddc_message_id { MOD_HDCP_MESSAGE_ID_INVALID = -1, @@ -648,18 +650,14 @@ enum mod_hdcp_status mod_hdcp_write_content_type(struct mod_hdcp *hdcp) enum mod_hdcp_status mod_hdcp_clear_cp_irq_status(struct mod_hdcp *hdcp) { - uint8_t clear_cp_irq_bit = 2; + uint8_t clear_cp_irq_bit = DP_CP_IRQ; uint32_t size = 1; if (is_dp_hdcp(hdcp)) { - if (hdcp->connection.link.dp.rev >= 0x14) - return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle, - DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &clear_cp_irq_bit, size) - ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE; - else - return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle, - DP_DEVICE_SERVICE_IRQ_VECTOR, &clear_cp_irq_bit, size) - ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE; + uint32_t cp_irq_addrs = (hdcp->connection.link.dp.rev >= 0x14) + ? DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0:DP_DEVICE_SERVICE_IRQ_VECTOR; + return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle, cp_irq_addrs, + &clear_cp_irq_bit, size) ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE; } return MOD_HDCP_STATUS_INVALID_OPERATION; -- 2.25.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx