RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

[Chen, Guchun]

[AMD Public Use]

You want to call it in SRIOV case or in bare-metal case?

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Jingwen Chen
Sent: Thursday, September 17, 2020 5:17 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, JingWen <jingwen.ch...@amd.com>
Subject: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

smu_post_init needs to enable SMU feature, while this require virtualization 
off. Skip it since this feature is not used in SRIOV.

v2: move the check to the early stage of smu_post_init.

Signed-off-by: Jingwen Chen <jingwen.ch...@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index a027c7fdad56..a950f009c794 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2631,6 +2631,9 @@ static int navi10_post_smu_init(struct smu_context *smu)
        uint64_t feature_mask = 0;
        int ret = 0;
 
+       if (!amdgpu_sriov_vf(adev))
+               return 0;
+
        /* For Naiv1x, enable these features only after DAL initialization */
        if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
                feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
--
2.25.1

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