[PATCH AUTOSEL 5.9 25/35] drm/amd/display: adding ddc_gpio_vga_reg_list to ddc reg def'ns

[Sasha Levin]

From: Martin Leung <martin.le...@amd.com>

[ Upstream commit a1d2afc5dde29a943d32bf92eb0408c9f19541fc ]

why:
oem-related ddc read/write fails without these regs

how:
copy from hw_factory_dcn20.c

Signed-off-by: Martin Leung <martin.le...@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pil...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 .../drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c 
b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
index 7e7fb65721073..9d3665f88c523 100644
--- a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
+++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
@@ -117,6 +117,12 @@ static const struct ddc_registers ddc_data_regs_dcn[] = {
        ddc_data_regs_dcn2(4),
        ddc_data_regs_dcn2(5),
        ddc_data_regs_dcn2(6),
+       {
+                       DDC_GPIO_VGA_REG_LIST(DATA),
+                       .ddc_setup = 0,
+                       .phy_aux_cntl = 0,
+                       .dc_gpio_aux_ctrl_5 = 0
+       }
 };
 
 static const struct ddc_registers ddc_clk_regs_dcn[] = {
@@ -126,6 +132,12 @@ static const struct ddc_registers ddc_clk_regs_dcn[] = {
        ddc_clk_regs_dcn2(4),
        ddc_clk_regs_dcn2(5),
        ddc_clk_regs_dcn2(6),
+       {
+                       DDC_GPIO_VGA_REG_LIST(CLK),
+                       .ddc_setup = 0,
+                       .phy_aux_cntl = 0,
+                       .dc_gpio_aux_ctrl_5 = 0
+       }
 };
 
 static const struct ddc_sh_mask ddc_shift[] = {
-- 
2.27.0

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