On Fri, Nov 13, 2020 at 02:53:17PM +0800, Liang, Prike wrote:
> The gfx_state_change_set() funtion can support set GFX power
> change status to D0/D3.
>
> Signed-off-by: Prike Liang <prike.li...@amd.com>
Reviewed-by: Huang Rui <ray.hu...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 18 +++++++++---------
> drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 2 ++
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 12 ++++++++++++
> drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 7 +++++++
> 4 files changed, 30 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index 380dd3a..cd2c676 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -828,14 +828,14 @@ int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev)
>
> void amdgpu_gfx_state_change_set(struct amdgpu_device *adev, enum
> gfx_change_state state)
> {
> -
> - mutex_lock(&adev->pm.mutex);
> -
> - if (adev->powerplay.pp_funcs &&
> - adev->powerplay.pp_funcs->gfx_state_change_set)
> + if (is_support_sw_smu(adev)) {
> + smu_gfx_state_change_set(&adev->smu, state);
> + } else {
> + mutex_lock(&adev->pm.mutex);
> + if (adev->powerplay.pp_funcs &&
> + adev->powerplay.pp_funcs->gfx_state_change_set)
> ((adev)->powerplay.pp_funcs->gfx_state_change_set(
> - (adev)->powerplay.pp_handle, state));
> -
> - mutex_unlock(&adev->pm.mutex);
> -
> + (adev)->powerplay.pp_handle, state));
> + mutex_unlock(&adev->pm.mutex);
> + }
> }
> diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> index 9724d6f..ae8ff7b 100644
> --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> @@ -576,6 +576,7 @@ struct pptable_funcs {
> int (*post_init)(struct smu_context *smu);
> void (*interrupt_work)(struct smu_context *smu);
> int (*gpo_control)(struct smu_context *smu, bool enablement);
> + int (*gfx_state_change_set)(struct smu_context *smu, uint32_t state);
> };
>
> typedef enum {
> @@ -764,6 +765,7 @@ int smu_get_status_gfxoff(struct amdgpu_device *adev,
> uint32_t *value);
> ssize_t smu_sys_get_gpu_metrics(struct smu_context *smu, void **table);
>
> int smu_enable_mgpu_fan_boost(struct smu_context *smu);
> +int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state);
>
> #endif
> #endif
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index 3999079..7b698c5 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -2529,3 +2529,15 @@ int smu_enable_mgpu_fan_boost(struct smu_context *smu)
>
> return ret;
> }
> +
> +int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state)
> +{
> + int ret = 0;
> +
> + mutex_lock(&smu->mutex);
> + if (smu->ppt_funcs->gfx_state_change_set)
> + ret = smu->ppt_funcs->gfx_state_change_set(smu, state);
> + mutex_unlock(&smu->mutex);
> +
> + return ret;
> +}
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> index 66c1026..46c44f0 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> @@ -1136,6 +1136,12 @@ static ssize_t renoir_get_gpu_metrics(struct
> smu_context *smu,
> return sizeof(struct gpu_metrics_v2_0);
> }
>
> +static int renoir_gfx_state_change_set(struct smu_context *smu, uint32_t
> state)
> +{
> +
> + return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GpuChangeState,
> state, NULL);
> +}
> +
> static const struct pptable_funcs renoir_ppt_funcs = {
> .set_power_state = NULL,
> .print_clk_levels = renoir_print_clk_levels,
> @@ -1171,6 +1177,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
> .get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
> .set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
> .get_gpu_metrics = renoir_get_gpu_metrics,
> + .gfx_state_change_set = renoir_gfx_state_change_set,
> };
>
> void renoir_set_ppt_funcs(struct smu_context *smu)
> --
> 2.7.4
>
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