[AMD Official Use Only - Internal Distribution Only] Acked-by: Alex Deucher <alexander.deuc...@amd.com> ________________________________ From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of Tao Zhou <tao.zh...@amd.com> Sent: Tuesday, November 17, 2020 2:32 AM To: Chen, Jiansong (Simon) <jiansong.c...@amd.com>; Gui, Jack <jack....@amd.com>; Zhang, Hawking <hawking.zh...@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org> Cc: Zhou1, Tao <tao.zh...@amd.com> Subject: [PATCH] drm/amd/pm: support runtime PPTable update for dimgrey_cavefish
There is no need to reset DPM for PPTable uploading on dimgrey_cavefish and PMFW can handle it, same as navy_flounder. Signed-off-by: Tao Zhou <tao.zh...@amd.com> --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 1904df5a3e20..8e3e7a5bbffe 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -1183,7 +1183,7 @@ static int smu_disable_dpms(struct smu_context *smu) */ if (smu->uploading_custom_pp_table && (adev->asic_type >= CHIP_NAVI10) && - (adev->asic_type <= CHIP_NAVY_FLOUNDER)) + (adev->asic_type <= CHIP_DIMGREY_CAVEFISH)) return 0; /* -- 2.17.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Calexander.deucher%40amd.com%7C8cf0d1af536d4d6349bc08d88acb08f2%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637411951942273028%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=UuQ66twRM2QL%2FTXOhEmkjfHH28p96lfLfL5qxJeQG9s%3D&reserved=0
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