The user prefers to know the real response value from C2PMSG 90 register which is written by firmware not -EIO.
v2: return C2PMSG 90 value Signed-off-by: Huang Rui <ray.hu...@amd.com> --- drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c index f8260769061c..59cf650efbd9 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c @@ -92,7 +92,7 @@ static int smu_cmn_wait_for_response(struct smu_context *smu) for (i = 0; i < timeout; i++) { cur_value = RREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_90); if ((cur_value & MP1_C2PMSG_90__CONTENT_MASK) != 0) - return cur_value == 0x1 ? 0 : -EIO; + return cur_value; udelay(1); } @@ -101,7 +101,7 @@ static int smu_cmn_wait_for_response(struct smu_context *smu) if (i == timeout) return -ETIME; - return RREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_90) == 0x1 ? 0 : -EIO; + return RREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_90); } int smu_cmn_send_smc_msg_with_param(struct smu_context *smu, @@ -123,7 +123,7 @@ int smu_cmn_send_smc_msg_with_param(struct smu_context *smu, mutex_lock(&smu->message_lock); ret = smu_cmn_wait_for_response(smu); - if (ret) { + if (ret != 0x1) { dev_err(adev->dev, "Msg issuing pre-check failed and " "SMU may be not in the right state!\n"); goto out; @@ -136,9 +136,9 @@ int smu_cmn_send_smc_msg_with_param(struct smu_context *smu, smu_cmn_send_msg_without_waiting(smu, (uint16_t)index); ret = smu_cmn_wait_for_response(smu); - if (ret) { + if (ret != 0x1) { dev_err(adev->dev, "failed send message: %10s (%d) \tparam: 0x%08x response %#x\n", - smu_get_message_name(smu, msg), index, param, ret); + smu_get_message_name(smu, msg), index, param, ret); goto out; } -- 2.25.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx