The function dcn20_patch_bounding_box is shared from DCN2 to DCN3 and
uses FPU operations. For this reason, this commit moves this function to
the fpu_commons file.
Signed-off-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 36 +---------------
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 3 --
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 3 +-
.../amd/display/dc/dcn302/dcn302_resource.c | 3 +-
.../display/dc/fpu_operation/fpu_commons.c | 43 +++++++++++++++++++
.../display/dc/fpu_operation/fpu_commons.h | 3 ++
7 files changed, 52 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index d5bf740b408c..e9257999148e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -3472,40 +3472,6 @@ void dcn20_update_bounding_box(struct dc *dc, struct
_vcs_dpi_soc_bounding_box_s
bb->clock_limits[num_calculated_states].state = bb->num_states;
}
-void dcn20_patch_bounding_box(struct dc *dc, struct
_vcs_dpi_soc_bounding_box_st *bb)
-{
- if ((int)(bb->sr_exit_time_us * 1000) !=
dc->bb_overrides.sr_exit_time_ns
- && dc->bb_overrides.sr_exit_time_ns) {
- bb->sr_exit_time_us = dc->bb_overrides.sr_exit_time_ns / 1000.0;
- }
-
- if ((int)(bb->sr_enter_plus_exit_time_us * 1000)
- != dc->bb_overrides.sr_enter_plus_exit_time_ns
- && dc->bb_overrides.sr_enter_plus_exit_time_ns) {
- bb->sr_enter_plus_exit_time_us =
- dc->bb_overrides.sr_enter_plus_exit_time_ns /
1000.0;
- }
-
- if ((int)(bb->urgent_latency_us * 1000) !=
dc->bb_overrides.urgent_latency_ns
- && dc->bb_overrides.urgent_latency_ns) {
- bb->urgent_latency_us = dc->bb_overrides.urgent_latency_ns /
1000.0;
- }
-
- if ((int)(bb->dram_clock_change_latency_us * 1000)
- != dc->bb_overrides.dram_clock_change_latency_ns
- && dc->bb_overrides.dram_clock_change_latency_ns) {
- bb->dram_clock_change_latency_us =
- dc->bb_overrides.dram_clock_change_latency_ns /
1000.0;
- }
-
- if ((int)(bb->dummy_pstate_latency_us * 1000)
- !=
dc->bb_overrides.dummy_clock_change_latency_ns
- && dc->bb_overrides.dummy_clock_change_latency_ns) {
- bb->dummy_pstate_latency_us =
- dc->bb_overrides.dummy_clock_change_latency_ns
/ 1000.0;
- }
-}
-
static struct _vcs_dpi_soc_bounding_box_st *get_asic_rev_soc_bb(
uint32_t hw_internal_rev)
{
@@ -3580,7 +3546,7 @@ static bool init_soc_bounding_box(struct dc *dc,
loaded_ip->max_num_otg = pool->base.res_cap->num_timing_generator;
loaded_ip->max_num_dpp = pool->base.pipe_count;
- dcn20_patch_bounding_box(dc, loaded_bb);
+ dcn_patch_bounding_box(dc, loaded_bb);
return true;
}
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
index 11ec655a18e3..4e6fda59ec29 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
@@ -167,9 +167,6 @@ enum dc_status dcn20_add_dsc_to_stream_resource(struct dc
*dc, struct dc_state *
enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state
*new_ctx, struct dc_stream_state *dc_stream);
enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state
*plane_state);
-void dcn20_patch_bounding_box(
- struct dc *dc,
- struct _vcs_dpi_soc_bounding_box_st *bb);
void dcn20_cap_soc_clocks(
struct _vcs_dpi_soc_bounding_box_st *bb,
struct pp_smu_nv_clock_table max_clocks);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 4edebee00095..98acc8be698f 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -1563,7 +1563,7 @@ static bool init_soc_bounding_box(struct dc *dc,
loaded_ip->max_num_otg = pool->base.res_cap->num_timing_generator;
loaded_ip->max_num_dpp = pool->base.pipe_count;
loaded_ip->clamp_min_dcfclk = dc->config.clamp_min_dcfclk;
- dcn20_patch_bounding_box(dc, loaded_bb);
+ dcn_patch_bounding_box(dc, loaded_bb);
if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {
struct bp_soc_bb_info bb_info = {0};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
index 934df194db38..e56925a89e4a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
@@ -36,6 +36,7 @@
#include "dcn20/dcn20_resource.h"
#include "fpu_operation/dcn3x_commons.h"
+#include "fpu_operation/fpu_commons.h"
#include "dcn10/dcn10_ipp.h"
#include "dcn301/dcn301_hubbub.h"
@@ -1502,7 +1503,7 @@ static bool init_soc_bounding_box(struct dc *dc,
loaded_ip->max_num_otg = pool->base.res_cap->num_timing_generator;
loaded_ip->max_num_dpp = pool->base.pipe_count;
- dcn20_patch_bounding_box(dc, loaded_bb);
+ dcn_patch_bounding_box(dc, loaded_bb);
if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {
struct bp_soc_bb_info bb_info = {0};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
index 539757ec3348..8a62ff16347a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
@@ -43,6 +43,7 @@
#include "dcn20/dcn20_dsc.h"
#include "dcn20/dcn20_resource.h"
#include "fpu_operation/dcn3x_commons.h"
+#include "fpu_operation/fpu_commons.h"
#include "dcn10/dcn10_resource.h"
@@ -1098,7 +1099,7 @@ static bool init_soc_bounding_box(struct dc *dc, struct
resource_pool *pool)
loaded_ip->max_num_otg = pool->pipe_count;
loaded_ip->max_num_dpp = pool->pipe_count;
loaded_ip->clamp_min_dcfclk = dc->config.clamp_min_dcfclk;
- dcn20_patch_bounding_box(dc, loaded_bb);
+ dcn_patch_bounding_box(dc, loaded_bb);
return true;
}
diff --git a/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.c
b/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.c
index d2089a1dc630..5ffab6715085 100644
--- a/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.c
+++ b/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.c
@@ -93,6 +93,41 @@ static void _dcn20_calculate_dlg_params(struct dc *dc,
struct dc_state *context,
}
}
+static void _dcn_patch_bounding_box(struct dc *dc,
+ struct _vcs_dpi_soc_bounding_box_st *bb)
+{
+ if ((int)(bb->sr_exit_time_us * 1000) !=
dc->bb_overrides.sr_exit_time_ns
+ && dc->bb_overrides.sr_exit_time_ns) {
+ bb->sr_exit_time_us = dc->bb_overrides.sr_exit_time_ns / 1000.0;
+ }
+
+ if ((int)(bb->sr_enter_plus_exit_time_us * 1000)
+ != dc->bb_overrides.sr_enter_plus_exit_time_ns
+ && dc->bb_overrides.sr_enter_plus_exit_time_ns) {
+ bb->sr_enter_plus_exit_time_us =
+ dc->bb_overrides.sr_enter_plus_exit_time_ns /
1000.0;
+ }
+
+ if ((int)(bb->urgent_latency_us * 1000) !=
dc->bb_overrides.urgent_latency_ns
+ && dc->bb_overrides.urgent_latency_ns) {
+ bb->urgent_latency_us = dc->bb_overrides.urgent_latency_ns /
1000.0;
+ }
+
+ if ((int)(bb->dram_clock_change_latency_us * 1000)
+ != dc->bb_overrides.dram_clock_change_latency_ns
+ && dc->bb_overrides.dram_clock_change_latency_ns) {
+ bb->dram_clock_change_latency_us =
+ dc->bb_overrides.dram_clock_change_latency_ns /
1000.0;
+ }
+
+ if ((int)(bb->dummy_pstate_latency_us * 1000)
+ !=
dc->bb_overrides.dummy_clock_change_latency_ns
+ && dc->bb_overrides.dummy_clock_change_latency_ns) {
+ bb->dummy_pstate_latency_us =
+ dc->bb_overrides.dummy_clock_change_latency_ns
/ 1000.0;
+ }
+}
+
void dcn20_calculate_dlg_params(struct dc *dc, struct dc_state *context,
display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel)
{
@@ -100,3 +135,11 @@ void dcn20_calculate_dlg_params(struct dc *dc, struct
dc_state *context,
_dcn20_calculate_dlg_params(dc, context, pipes, pipe_cnt, vlevel);
DC_FP_END();
}
+
+void dcn_patch_bounding_box(struct dc *dc,
+ struct _vcs_dpi_soc_bounding_box_st *bb)
+{
+ DC_FP_START();
+ _dcn_patch_bounding_box(dc, bb);
+ DC_FP_END();
+}
diff --git a/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.h
b/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.h
index 8d23fa8e87ee..1eda6a4399a4 100644
--- a/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.h
+++ b/drivers/gpu/drm/amd/display/dc/fpu_operation/fpu_commons.h
@@ -31,4 +31,7 @@ void dcn20_calculate_dlg_params(struct dc *dc, struct
dc_state *context,
int pipe_cnt,
int vlevel);
+void dcn_patch_bounding_box(struct dc *dc,
+ struct _vcs_dpi_soc_bounding_box_st *bb);
+
#endif
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
