No need to have special handling for swSMU supported ASICs.

Change-Id: I7292c1064c3a1c75dc9f91d7c5318eab4f407241
Signed-off-by: Evan Quan <evan.q...@amd.com>
---
 drivers/gpu/drm/amd/pm/amdgpu_dpm.c       | 9 ---------
 drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h   | 3 ---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 6 +++---
 3 files changed, 3 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index 464fc04fb334..03581d5b1836 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -927,7 +927,6 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device 
*adev, uint32_t block
 {
        int ret = 0;
        const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
-       bool swsmu = is_support_sw_smu(adev);
 
        switch (block_type) {
        case AMD_IP_BLOCK_TYPE_UVD:
@@ -968,15 +967,7 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device 
*adev, uint32_t block
        case AMD_IP_BLOCK_TYPE_GFX:
        case AMD_IP_BLOCK_TYPE_VCN:
        case AMD_IP_BLOCK_TYPE_SDMA:
-               if (pp_funcs && pp_funcs->set_powergating_by_smu) {
-                       ret = (pp_funcs->set_powergating_by_smu(
-                               (adev)->powerplay.pp_handle, block_type, gate));
-               }
-               break;
        case AMD_IP_BLOCK_TYPE_JPEG:
-               if (swsmu)
-                       ret = smu_dpm_set_power_gate(&adev->smu, block_type, 
gate);
-               break;
        case AMD_IP_BLOCK_TYPE_GMC:
        case AMD_IP_BLOCK_TYPE_ACP:
                if (pp_funcs && pp_funcs->set_powergating_by_smu) {
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 4684eca7b37b..059d2c4e4c7f 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -1305,9 +1305,6 @@ bool is_support_sw_smu(struct amdgpu_device *adev);
 bool is_support_cclk_dpm(struct amdgpu_device *adev);
 int smu_write_watermarks_table(struct smu_context *smu);
 
-/* smu to display interface */
-extern int smu_dpm_set_power_gate(void *handle, uint32_t block_type, bool 
gate);
-
 int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
                           uint32_t *min, uint32_t *max);
 
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index e136f071b4f2..0d1372d440ed 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -268,9 +268,9 @@ static int smu_dpm_set_jpeg_enable(struct smu_context *smu,
  *    Under this case, the smu->mutex lock protection is already enforced on
  *    the parent API smu_force_performance_level of the call path.
  */
-int smu_dpm_set_power_gate(void *handle,
-                          uint32_t block_type,
-                          bool gate)
+static int smu_dpm_set_power_gate(void *handle,
+                                 uint32_t block_type,
+                                 bool gate)
 {
        struct smu_context *smu = handle;
        int ret = 0;
-- 
2.29.0

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