[AMD Official Use Only - Internal Distribution Only]
Hi Jay,
Could you please add few details on the root cause, in the [Why/How] section?
Thanks,
Bindu
________________________________
From: Aurabindo Pillai <aurabindo.pil...@amd.com>
Sent: Thursday, April 8, 2021 11:48 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Pillai, Aurabindo <aurabindo.pil...@amd.com>; R, Bindu <bind...@amd.com>;
Aberback, Joshua <joshua.aberb...@amd.com>
Subject: [PATCH] drm/amd/display: Update DCN302 SR Exit Latency
From: Joshua Aberback <joshua.aberb...@amd.com>
[Why]
Update SR Exit Latency to fix screen flickering caused due to OTG
underflow
Signed-off-by: Joshua Aberback <joshua.aberb...@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pil...@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
index a928c1d9a557..fc2dea243d1b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
@@ -164,7 +164,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_02_soc = {
.min_dcfclk = 500.0, /* TODO: set this to actual min DCFCLK */
.num_states = 1,
- .sr_exit_time_us = 12,
+ .sr_exit_time_us = 15.5,
.sr_enter_plus_exit_time_us = 20,
.urgent_latency_us = 4.0,
.urgent_latency_pixel_data_only_us = 4.0,
--
2.31.1
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