modify Powerplay API get_power_limit to use pp_power_limit_level
update Powerplay API get_power_limit calls to use pp_power_limit_level
modify pp_get_power_limit to use new Powerplay API
add new error return to pp_get_power_limit for unhandled pp_power_limit_level
* Test (non smu)
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f
11`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
lspci -nn | grep "VGA\|Display" ; \
echo "=== power1 cap ===" ; cat $HWMON_DIR/power1_cap ; \
echo "=== power1 cap max ===" ; cat $HWMON_DIR/power1_cap_max ; \
echo "=== power1 cap def ===" ; cat $HWMON_DIR/power1_cap_default
Signed-off-by: Darren Powell <darren.pow...@amd.com>
---
.../gpu/drm/amd/include/kgd_pp_interface.h | 4 +--
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 9 +++---
.../gpu/drm/amd/pm/powerplay/amd_powerplay.c | 29 ++++++++++++-------
3 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index cf98b9afb362..606c89eb206f 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -302,8 +302,8 @@ struct amd_pm_funcs {
uint32_t block_type, bool gate);
int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
int (*set_power_limit)(void *handle, uint32_t n);
- int (*get_power_limit)(void *handle, uint32_t *limit, uint32_t
*max_limit,
- bool default_limit);
+ int (*get_power_limit)(void *handle, uint32_t *limit,
+ enum pp_power_limit_level pwr_limit_level);
int (*get_power_profile_mode)(void *handle, char *buf);
int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
int (*set_fine_grain_clk_vol)(void *handle, uint32_t type, long *input,
uint32_t size);
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index bd5af70ac739..6130318dd993 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -2720,7 +2720,6 @@ static ssize_t amdgpu_hwmon_show_power_cap_max(struct
device *dev,
int limit_type = to_sensor_dev_attr(attr)->index;
uint32_t limit;
enum pp_power_limit_level limit_level;
- uint32_t max_limit = 0;
ssize_t size;
int r;
@@ -2741,8 +2740,8 @@ static ssize_t amdgpu_hwmon_show_power_cap_max(struct
device *dev,
size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
} else if (pp_funcs && pp_funcs->get_power_limit) {
pp_funcs->get_power_limit(adev->powerplay.pp_handle,
- &limit, &max_limit, true);
- size = snprintf(buf, PAGE_SIZE, "%u\n", max_limit * 1000000);
+ &limit, PP_PWR_LIMIT_MAX);
+ size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
} else {
size = snprintf(buf, PAGE_SIZE, "\n");
}
@@ -2782,7 +2781,7 @@ static ssize_t amdgpu_hwmon_show_power_cap(struct device
*dev,
size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
} else if (pp_funcs && pp_funcs->get_power_limit) {
pp_funcs->get_power_limit(adev->powerplay.pp_handle,
- &limit, NULL, false);
+ &limit, PP_PWR_LIMIT_CURRENT);
size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
} else {
size = snprintf(buf, PAGE_SIZE, "\n");
@@ -2823,7 +2822,7 @@ static ssize_t amdgpu_hwmon_show_power_cap_default(struct
device *dev,
size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
} else if (pp_funcs && pp_funcs->get_power_limit) {
pp_funcs->get_power_limit(adev->powerplay.pp_handle,
- &limit, NULL, true);
+ &limit, PP_PWR_LIMIT_DEFAULT);
size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
} else {
size = snprintf(buf, PAGE_SIZE, "\n");
diff --git a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
index c73504e998e5..833e2d3f8f41 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
@@ -1035,31 +1035,38 @@ static int pp_set_power_limit(void *handle, uint32_t
limit)
}
static int pp_get_power_limit(void *handle, uint32_t *limit,
- uint32_t *max_limit, bool default_limit)
+ enum pp_power_limit_level pwr_limit_level)
{
struct pp_hwmgr *hwmgr = handle;
+ int ret = 0;
if (!hwmgr || !hwmgr->pm_en ||!limit)
return -EINVAL;
mutex_lock(&hwmgr->smu_lock);
- if (default_limit) {
- *limit = hwmgr->default_power_limit;
- if (max_limit) {
- *max_limit = *limit;
+ switch (pwr_limit_level) {
+ case PP_PWR_LIMIT_CURRENT:
+ *limit = hwmgr->power_limit;
+ break;
+ case PP_PWR_LIMIT_DEFAULT:
+ *limit = hwmgr->default_power_limit;
+ break;
+ case PP_PWR_LIMIT_MAX:
+ *limit = hwmgr->default_power_limit;
if (hwmgr->od_enabled) {
- *max_limit *= (100 +
hwmgr->platform_descriptor.TDPODLimit);
- *max_limit /= 100;
+ *limit *= (100 +
hwmgr->platform_descriptor.TDPODLimit);
+ *limit /= 100;
}
- }
+ break;
+ default:
+ ret = -EOPNOTSUPP;
+ break;
}
- else
- *limit = hwmgr->power_limit;
mutex_unlock(&hwmgr->smu_lock);
- return 0;
+ return ret;
}
static int pp_display_configuration_change(void *handle,
--
2.25.1
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