[Public]


> -----Original Message-----
> From: Chen, Guchun <guchun.c...@amd.com>
> Sent: Wednesday, July 7, 2021 12:48 PM
> To: Quan, Evan <evan.q...@amd.com>; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Quan, Evan
> <evan.q...@amd.com>
> Subject: RE: [PATCH 1/7] drm/amd/pm: correct the fan speed RPM setting
> 
> [Public]
> 
> tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed);
> 
> Any multiplication's overflow possibility?
[Quan, Evan] crystal_clock_freq is actually always 2500. So, it's pretty safe 
here.
BR
Evan
> Regards,
> Guchun
> 
> -----Original Message-----
> From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Evan
> Quan
> Sent: Wednesday, July 7, 2021 9:57 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Quan, Evan
> <evan.q...@amd.com>
> Subject: [PATCH 1/7] drm/amd/pm: correct the fan speed RPM setting
> 
> The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
> PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
> perform the fan speed RPM setting.
> 
> Change-Id: I1afe8102f02ead9a8a07c7105f689ac60a85b0d8
> Signed-off-by: Evan Quan <evan.q...@amd.com>
> ---
>  drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h       |  5 +++
>  drivers/gpu/drm/amd/pm/inc/smu_v11_0.h        |  3 ++
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c     |  9 ++---
>  .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c |  1 +
>  .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   |  1 +
>  .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c   |  1 +
>  .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    | 36
> +++++++++++++++++++
>  7 files changed, 52 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> index 3e89852e4820..6301e4cb3c2a 100644
> --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> @@ -1039,6 +1039,11 @@ struct pptable_funcs {
>        */
>       int (*set_fan_speed_percent)(struct smu_context *smu, uint32_t
> speed);
> 
> +     /**
> +      * @set_fan_speed_rpm: Set a static fan speed in rpm.
> +      */
> +     int (*set_fan_speed_rpm)(struct smu_context *smu, uint32_t
> speed);
> +
>       /**
>        * @set_xgmi_pstate: Set inter-chip global memory interconnect
> pstate.
>        * &pstate: Pstate to set. D0 if Nonzero, D3 otherwise.
> diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> index b89e7dca8906..134a33e3de91 100644
> --- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> +++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> @@ -223,6 +223,9 @@ smu_v11_0_set_fan_control_mode(struct
> smu_context *smu,  int smu_v11_0_set_fan_speed_percent(struct
> smu_context *smu,
>                                   uint32_t speed);
> 
> +int smu_v11_0_set_fan_speed_rpm(struct smu_context *smu,
> +                             uint32_t speed);
> +
>  int smu_v11_0_set_xgmi_pstate(struct smu_context *smu,
>                                    uint32_t pstate);
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index ebe672142808..576e9ea68fd1 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -2174,11 +2174,12 @@ static int smu_set_fan_speed_rpm(void *handle,
> uint32_t speed)
> 
>       mutex_lock(&smu->mutex);
> 
> -     if (smu->ppt_funcs->set_fan_speed_percent) {
> -             percent = speed * 100 / smu->fan_max_rpm;
> -             ret = smu->ppt_funcs->set_fan_speed_percent(smu,
> percent);
> -             if (!ret && !(smu->user_dpm_profile.flags &
> SMU_DPM_USER_PROFILE_RESTORE))
> +     if (smu->ppt_funcs->set_fan_speed_rpm) {
> +             ret = smu->ppt_funcs->set_fan_speed_rpm(smu, speed);
> +             if (!ret && smu->user_dpm_profile.flags &
> SMU_DPM_USER_PROFILE_RESTORE) {
> +                     percent = speed * 100 / smu->fan_max_rpm;
>                       smu->user_dpm_profile.fan_speed_percent =
> percent;
> +             }
>       }
> 
>       mutex_unlock(&smu->mutex);
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index 6b3e0ea10163..047adf6dd444 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -2314,6 +2314,7 @@ static const struct pptable_funcs
> arcturus_ppt_funcs = {
>       .get_fan_control_mode = smu_v11_0_get_fan_control_mode,
>       .set_fan_control_mode = smu_v11_0_set_fan_control_mode,
>       .set_fan_speed_percent = smu_v11_0_set_fan_speed_percent,
> +     .set_fan_speed_rpm = smu_v11_0_set_fan_speed_rpm,
>       .set_xgmi_pstate = smu_v11_0_set_xgmi_pstate,
>       .gfx_off_control = smu_v11_0_gfx_off_control,
>       .register_irq_handler = smu_v11_0_register_irq_handler, diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index 59ea59acfb00..d8a011483dcf 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -3248,6 +3248,7 @@ static const struct pptable_funcs navi10_ppt_funcs
> = {
>       .get_fan_control_mode = smu_v11_0_get_fan_control_mode,
>       .set_fan_control_mode = smu_v11_0_set_fan_control_mode,
>       .set_fan_speed_percent = smu_v11_0_set_fan_speed_percent,
> +     .set_fan_speed_rpm = smu_v11_0_set_fan_speed_rpm,
>       .set_xgmi_pstate = smu_v11_0_set_xgmi_pstate,
>       .gfx_off_control = smu_v11_0_gfx_off_control,
>       .register_irq_handler = smu_v11_0_register_irq_handler, diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index 83d8e53ca1f8..dad120294c19 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -3886,6 +3886,7 @@ static const struct pptable_funcs
> sienna_cichlid_ppt_funcs = {
>       .get_fan_control_mode = smu_v11_0_get_fan_control_mode,
>       .set_fan_control_mode = smu_v11_0_set_fan_control_mode,
>       .set_fan_speed_percent = smu_v11_0_set_fan_speed_percent,
> +     .set_fan_speed_rpm = smu_v11_0_set_fan_speed_rpm,
>       .set_xgmi_pstate = smu_v11_0_set_xgmi_pstate,
>       .gfx_off_control = smu_v11_0_gfx_off_control,
>       .register_irq_handler = smu_v11_0_register_irq_handler, diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> index 388c5cb5c647..fefc8e93fdc6 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> @@ -1213,6 +1213,42 @@ smu_v11_0_set_fan_speed_percent(struct
> smu_context *smu, uint32_t speed)
>       return smu_v11_0_set_fan_static_mode(smu,
> FDO_PWM_MODE_STATIC);  }
> 
> +int smu_v11_0_set_fan_speed_rpm(struct smu_context *smu,
> +                             uint32_t speed)
> +{
> +     struct amdgpu_device *adev = smu->adev;
> +     uint32_t tach_period, crystal_clock_freq;
> +     int ret;
> +
> +     ret = smu_v11_0_auto_fan_control(smu, 0);
> +     if (ret)
> +             return ret;
> +
> +     /*
> +      * crystal_clock_freq div by 4 is required since the fan control
> +      * module refers to 25MHz
> +      */
> +     crystal_clock_freq = amdgpu_asic_get_xclk(adev) / 4;
> +
> +     /*
> +      * To prevent from possible overheat, some ASICs may have
> requirement
> +      * for minimum fan speed:
> +      * - For some NV10 SKU, the fan speed cannot be set lower than
> +      *   700 RPM.
> +      * - For some Sienna Cichlid SKU, the fan speed cannot be set
> +      *   lower than 500 RPM.
> +      */
> +     tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed);
> +     WREG32_SOC15(THM, 0, mmCG_TACH_CTRL,
> +                  REG_SET_FIELD(RREG32_SOC15(THM, 0,
> mmCG_TACH_CTRL),
> +                                CG_TACH_CTRL, TARGET_PERIOD,
> +                                tach_period));
> +
> +     ret = smu_v11_0_set_fan_static_mode(smu,
> FDO_PWM_MODE_STATIC_RPM);
> +
> +     return ret;
> +}
> +
>  int
>  smu_v11_0_set_fan_control_mode(struct smu_context *smu,
>                              uint32_t mode)
> --
> 2.29.0
> 
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