[PATCH 5/5] drm/amd/display: Enable dpia in dmub only for DCN31 B0

[Nicholas Kazlauskas]

From: Jude Shih <shens...@amd.com>

[Why]
DMUB binary is common for both A0 and B0. Hence, driver should
notify FW about the support for DPIA in B0.

[How]
Added dpia_supported bit in dmub_fw_boot_options and will be set
only for B0.

Assign dpia_supported to true before dm_dmub_hw_init
in B0 case.

Signed-off-by: Jude Shih <shens...@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 ++++++++++++
 drivers/gpu/drm/amd/display/dmub/dmub_srv.h       |  1 +
 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c |  1 +
 3 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 0ad6d0e2a2d8..139a7707f317 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1017,6 +1017,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
        const unsigned char *fw_inst_const, *fw_bss_data;
        uint32_t i, fw_inst_const_size, fw_bss_data_size;
        bool has_hw_support;
+       struct dc *dc = adev->dm.dc;
 
        if (!dmub_srv)
                /* DMUB isn't supported on the ASIC. */
@@ -1103,6 +1104,17 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
        for (i = 0; i < fb_info->num_fb; ++i)
                hw_params.fb[i] = &fb_info->fb[i];
 
+       switch (adev->asic_type) {
+       case CHIP_YELLOW_CARP:
+               if (dc->ctx->asic_id.hw_internal_rev != YELLOW_CARP_A0) {
+                       hw_params.dpia_supported = true;
+                       hw_params.disable_dpia = 
dc->debug.dpia_debug.bits.disable_dpia;
+               }
+               break;
+       default:
+               break;
+       }
+
        status = dmub_srv_hw_init(dmub_srv, &hw_params);
        if (status != DMUB_STATUS_OK) {
                DRM_ERROR("Error initializing DMUB HW: %d\n", status);
diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h 
b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
index 6c4f0ada163f..717c0e572d2f 100644
--- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
@@ -238,6 +238,7 @@ struct dmub_srv_hw_params {
        bool load_inst_const;
        bool skip_panel_power_sequence;
        bool disable_z10;
+       bool dpia_supported;
        bool disable_dpia;
 };
 
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c 
b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
index 5df990277dd4..10ebf20eaa41 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
@@ -338,6 +338,7 @@ void dmub_dcn31_enable_dmub_boot_options(struct dmub_srv 
*dmub, const struct dmu
        union dmub_fw_boot_options boot_options = {0};
 
        boot_options.bits.z10_disable = params->disable_z10;
+       boot_options.bits.dpia_supported = params->dpia_supported;
        boot_options.bits.enable_dpia = params->disable_dpia ? 0 : 1;
 
        boot_options.bits.sel_mux_phy_c_d_phy_f_g = (dmub->asic == 
DMUB_ASIC_DCN31B) ? 1 : 0;
-- 
2.25.1