From: Oliver Logush <oliver.log...@amd.com>

[why]
To get the the cyan_skillfish check working

Reviewed-by: Charlene Liu <charlene....@amd.com>
Reviewed-by: Charlene Liu <charlene....@amd.com>
Acked-by: Jasdeep Dhillon <jdhil...@amd.com>
Signed-off-by: Oliver Logush <oliver.log...@amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +++++++++++++++++--
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  2 +-
 .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c  |  2 +-
 .../gpu/drm/amd/display/dc/core/dc_resource.c |  2 +-
 .../gpu/drm/amd/display/include/dal_asic_id.h |  3 ++-
 5 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 8f53c9f6b267..f5941e59e5ad 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1014,6 +1014,14 @@ static  void amdgpu_dm_audio_eld_notify(struct 
amdgpu_device *adev, int pin)
        }
 }
 
+bool is_skillfish_series(struct amdgpu_device *adev)
+{
+       if (adev->asic_type == CHIP_CYAN_SKILLFISH || adev->pdev->revision == 
0x143F) {
+               return true;
+       }
+       return false;
+}
+
 static int dm_dmub_hw_init(struct amdgpu_device *adev)
 {
        const struct dmcub_firmware_header_v1_0 *hdr;
@@ -1049,7 +1057,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
                return -EINVAL;
        }
 
-       if (!has_hw_support) {
+       if (is_skillfish_series(adev)) {
                DRM_INFO("DMUB unsupported on ASIC\n");
                return 0;
        }
@@ -1471,6 +1479,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
                default:
                        break;
                }
+               if (is_skillfish_series(adev)) {
+                       init_data.flags.disable_dmcu = true;
+                       break;
+               }
                break;
        }
 
@@ -1777,7 +1789,6 @@ static int load_dmcu_fw(struct amdgpu_device *adev)
        case CHIP_VEGA10:
        case CHIP_VEGA12:
        case CHIP_VEGA20:
-               return 0;
        case CHIP_NAVI12:
                fw_name_dmcu = FIRMWARE_NAVI12_DMCU;
                break;
@@ -1805,6 +1816,9 @@ static int load_dmcu_fw(struct amdgpu_device *adev)
                default:
                        break;
                }
+               if (is_skillfish_series(adev)) {
+                       return 0;
+               }
                DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type);
                return -EINVAL;
        }
@@ -4515,6 +4529,12 @@ static int dm_early_init(void *handle)
                adev->mode_info.num_dig = 6;
                break;
        default:
+       if (is_skillfish_series(adev)) {
+                       adev->mode_info.num_crtc = 2;
+                       adev->mode_info.num_hpd = 2;
+                       adev->mode_info.num_dig = 2;
+                       break;
+       }
 #if defined(CONFIG_DRM_AMD_DC_DCN)
                switch (adev->ip_versions[DCE_HWIP][0]) {
                case IP_VERSION(2, 0, 2):
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index e35977fda5c1..13875d669acd 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -82,7 +82,7 @@ struct common_irq_params {
        enum dc_irq_source irq_src;
        atomic64_t previous_timestamp;
 };
-
+bool is_skillfish_series(struct amdgpu_device *adev);
 /**
  * struct dm_compressor_info - Buffer info used by frame buffer compression
  * @cpu_addr: MMIO cpu addr
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c 
b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index 9200c8ce02ba..54ef83fe5a9b 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
@@ -259,7 +259,7 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, 
struct pp_smu_funcs *p
                        dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
                        return &clk_mgr->base;
                }
-               if (asic_id.chip_id == DEVICE_ID_NV_13FE) {
+               if (asic_id.chip_id == DEVICE_ID_NV_NAVI10_LITE_P_13FE) {
                        dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
                        return &clk_mgr->base;
                }
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 9df66501a453..8a199d661a66 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -135,7 +135,7 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id 
asic_id)
 
        case FAMILY_NV:
                dc_version = DCN_VERSION_2_0;
-               if (asic_id.chip_id == DEVICE_ID_NV_13FE) {
+               if (asic_id.chip_id == DEVICE_ID_NV_NAVI10_LITE_P_13FE || 
asic_id.chip_id == DEVICE_ID_NV_NAVI10_LITE_P_143F) {
                        dc_version = DCN_VERSION_2_01;
                        break;
                }
diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h 
b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
index e4a2dfacab4c..c25bc4d9cd4b 100644
--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
+++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
@@ -211,7 +211,8 @@ enum {
 #ifndef ASICREV_IS_GREEN_SARDINE
 #define ASICREV_IS_GREEN_SARDINE(eChipRev) ((eChipRev >= GREEN_SARDINE_A0) && 
(eChipRev < 0xFF))
 #endif
-#define DEVICE_ID_NV_13FE 0x13FE  // CYAN_SKILLFISH
+#define DEVICE_ID_NV_NAVI10_LITE_P_13FE          0x13FE  // CYAN_SKILLFISH
+#define DEVICE_ID_NV_NAVI10_LITE_P_143F                        0x143F // ROBIN+
 #define FAMILY_VGH 144
 #define DEVICE_ID_VGH_163F 0x163F
 #define VANGOGH_A0 0x01
-- 
2.25.1

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