Hi,
Is S0i3 verified for DCN 3.1.6 with this?
BR,
Chandan V N
>From: Eric Yang <eric.ya...@amd.com>
>
>[ Upstream commit 9b9bd3f640640f94272a461b2dfe558f91b322c5 ]
>
> [Why]
>Z10 and S0i3 have some shared path. Previous code clean up , incorrectly
>removed these pointers, which breaks s0i3 restore
>
> [How]
>Do not clear the function pointers based on Z10 disable.
>
>Reviewed-by: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>
>Acked-by: Pavle Kotarac <pavle.kota...@amd.com>
>Signed-off-by: Eric Yang <eric.ya...@amd.com>
>Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
>Signed-off-by: Sasha Levin <sas...@kernel.org>
>---
> drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 -----
> 1 file changed, 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>index d7559e5a99ce..e708f07fe75a 100644
>--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>@@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc)
> dc->hwss.init_hw = dcn20_fpga_init_hw;
> dc->hwseq->funcs.init_pipes = NULL;
> }
>- if (dc->debug.disable_z10) {
>- /*hw not support z10 or sw disable it*/
>- dc->hwss.z10_restore = NULL;
>- dc->hwss.z10_save_init = NULL;
>- }
> }
>--
>2.35.1
>
