Re: [PATCH] drm/amdgpu: always flush the TLB on gfx8

[Pierre-Eric Pelloux-Prayer]

Hi Christian,

This patch fixes almost all GPU faults on polaris caused by 86fd5edfbdae 
"drm/amdgpu: rework TLB flushing".

I still get occasional faults though, about 1 every 3 runs of a subset of 
piglit tests.

Thanks,
Pierre-Eric



On 03/06/2022 15:05, Christian König wrote:
> The TLB on GFX8 stores each block of 8 PTEs where any of the valid bits
> are set.
> 
> Signed-off-by: Christian König <christian.koe...@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 9596c22fded6..b747488c28ad 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -847,6 +847,11 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, 
> struct amdgpu_vm *vm,
>       flush_tlb |= adev->gmc.xgmi.num_physical_nodes &&
>                    adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 0);
>  
> +     /*
> +      * On GFX8 and older any 8 PTE block with a valid bit set enters the TLB
> +      */
> +     flush_tlb |= adev->ip_versions[GC_HWIP][0] < IP_VERSION(9, 0, 0);
> +
>       memset(&params, 0, sizeof(params));
>       params.adev = adev;
>       params.vm = vm;
>