[PATCH 23/31] drm/amd/display: Check minimum disp_clk and dpp_clk debug option

[Rodrigo Siqueira]

Our debug struct has the min_disp_clk_khz and min_dpp_clk_khz options,
which we ignore in the DCN32. This commit introduces those checks and
the necessary calculation.

Signed-off-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
 .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c  | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c 
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
index ed70ae10bdb1..b32880afb3fb 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
@@ -265,6 +265,25 @@ void dcn32_init_clocks(struct clk_mgr *clk_mgr_base)
                        
&clk_mgr_base->bw_params->clk_table.entries[0].dispclk_mhz,
                        &num_levels);
 
+       if (clk_mgr_base->ctx->dc->debug.min_disp_clk_khz) {
+               unsigned int i;
+
+               for (i = 0; i < num_levels; i++)
+                       if 
(clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz
+                                       < 
khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz))
+                               
clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz
+                                       = 
khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz);
+       }
+
+       if (clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz) {
+               unsigned int i;
+
+               for (i = 0; i < num_levels; i++)
+                       if 
(clk_mgr_base->bw_params->clk_table.entries[i].dppclk_mhz
+                                       < 
khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz))
+                               
clk_mgr_base->bw_params->clk_table.entries[i].dppclk_mhz
+                                       = 
khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz);
+       }
 
        /* Get UCLK, update bounding box */
        clk_mgr_base->funcs->get_memclk_states_from_smu(clk_mgr_base);
-- 
2.25.1