Add I2S MICSP instance support for Stoney variant.

Signed-off-by: Vijendar Mukunda <vijendar.muku...@amd.com>
---
 sound/soc/amd/acp-pcm-dma.c | 50 +++++++++++++++++++++++++++++++++++--
 sound/soc/amd/acp.h         | 13 ++++++++++
 2 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
index 1cd2e70a57df..198358d28ea9 100644
--- a/sound/soc/amd/acp-pcm-dma.c
+++ b/sound/soc/amd/acp-pcm-dma.c
@@ -433,6 +433,7 @@ static void acp_dma_start(void __iomem *acp_mmio, u16 
ch_num, bool is_circular)
        case I2S_TO_ACP_DMA_CH_NUM:
        case ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM:
        case I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM:
+       case ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM:
                dma_ctrl |= ACP_DMA_CNTL_0__DMAChIOCEn_MASK;
                break;
        default:
@@ -710,6 +711,13 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
+       if ((intr_flag & BIT(ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM)) != 0) {
+               valid_irq = true;
+               snd_pcm_period_elapsed(irq_data->play_i2s_micsp_stream);
+               acp_reg_write((intr_flag & 
BIT(ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM)) << 16,
+                             acp_mmio, mmACP_EXTERNAL_INTR_STAT);
+       }
+
        if ((intr_flag & BIT(ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM)) != 0) {
                valid_irq = true;
                snd_pcm_period_elapsed(irq_data->play_i2sbt_stream);
@@ -807,7 +815,8 @@ static int acp_dma_open(struct snd_soc_component *component,
         * stream is not closed
         */
        if (!intr_data->play_i2ssp_stream && !intr_data->capture_i2ssp_stream &&
-           !intr_data->play_i2sbt_stream && !intr_data->capture_i2sbt_stream)
+           !intr_data->play_i2sbt_stream && !intr_data->capture_i2sbt_stream &&
+           !intr_data->play_i2s_micsp_stream)
                acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
 
        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
@@ -867,6 +876,9 @@ static int acp_dma_hw_params(struct snd_soc_component 
*component,
                        case I2S_BT_INSTANCE:
                                val |= ACP_I2S_BT_16BIT_RESOLUTION_EN;
                                break;
+                       case I2S_MICSP_INSTANCE:
+                               val |= ACP_I2S_MICSP_16BIT_RESOLUTION_EN;
+                               break;
                        case I2S_SP_INSTANCE:
                        default:
                                val |= ACP_I2S_SP_16BIT_RESOLUTION_EN;
@@ -876,6 +888,7 @@ static int acp_dma_hw_params(struct snd_soc_component 
*component,
                        case I2S_BT_INSTANCE:
                                val |= ACP_I2S_BT_16BIT_RESOLUTION_EN;
                                break;
+                       case I2S_MICSP_INSTANCE:
                        case I2S_SP_INSTANCE:
                        default:
                                val |= ACP_I2S_MIC_16BIT_RESOLUTION_EN;
@@ -901,6 +914,27 @@ static int acp_dma_hw_params(struct snd_soc_component 
*component,
                                        mmACP_I2S_BT_TRANSMIT_BYTE_CNT_LOW;
                        adata->play_i2sbt_stream = substream;
                        break;
+               case I2S_MICSP_INSTANCE:
+                       switch (adata->asic_type) {
+                       case CHIP_STONEY:
+                               rtd->pte_offset = ACP_ST_PLAYBACK_PTE_OFFSET;
+                               break;
+                       default:
+                               rtd->pte_offset = ACP_PLAYBACK_PTE_OFFSET;
+                       }
+                       rtd->ch1 = SYSRAM_TO_ACP_MICSP_INSTANCE_CH_NUM;
+                       rtd->ch2 = ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM;
+                       rtd->sram_bank = ACP_SRAM_BANK_1_ADDRESS;
+                       rtd->destination = TO_ACP_I2S_2;
+                       rtd->dma_dscr_idx_1 = PLAYBACK_START_DMA_DESCR_CH4;
+                       rtd->dma_dscr_idx_2 = PLAYBACK_START_DMA_DESCR_CH5;
+                       rtd->byte_cnt_high_reg_offset =
+                                       mmACP_I2S_MICSP_TRANSMIT_BYTE_CNT_HIGH;
+                       rtd->byte_cnt_low_reg_offset =
+                                       mmACP_I2S_MICSP_TRANSMIT_BYTE_CNT_LOW;
+
+                       adata->play_i2s_micsp_stream = substream;
+                       break;
                case I2S_SP_INSTANCE:
                default:
                        switch (adata->asic_type) {
@@ -939,6 +973,7 @@ static int acp_dma_hw_params(struct snd_soc_component 
*component,
                        rtd->dma_curr_dscr = mmACP_DMA_CUR_DSCR_11;
                        adata->capture_i2sbt_stream = substream;
                        break;
+               case I2S_MICSP_INSTANCE:
                case I2S_SP_INSTANCE:
                default:
                        rtd->pte_offset = ACP_CAPTURE_PTE_OFFSET;
@@ -1160,6 +1195,9 @@ static int acp_dma_close(struct snd_soc_component 
*component,
                case I2S_BT_INSTANCE:
                        adata->play_i2sbt_stream = NULL;
                        break;
+               case I2S_MICSP_INSTANCE:
+                       adata->play_i2s_micsp_stream = NULL;
+                       break;
                case I2S_SP_INSTANCE:
                default:
                        adata->play_i2ssp_stream = NULL;
@@ -1181,6 +1219,7 @@ static int acp_dma_close(struct snd_soc_component 
*component,
                case I2S_BT_INSTANCE:
                        adata->capture_i2sbt_stream = NULL;
                        break;
+               case I2S_MICSP_INSTANCE:
                case I2S_SP_INSTANCE:
                default:
                        adata->capture_i2ssp_stream = NULL;
@@ -1197,7 +1236,8 @@ static int acp_dma_close(struct snd_soc_component 
*component,
         * another stream is also not active.
         */
        if (!adata->play_i2ssp_stream && !adata->capture_i2ssp_stream &&
-           !adata->play_i2sbt_stream && !adata->capture_i2sbt_stream)
+           !adata->play_i2sbt_stream && !adata->capture_i2sbt_stream &&
+           !adata->play_i2s_micsp_stream)
                acp_reg_write(0, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
        kfree(rtd);
        return 0;
@@ -1245,6 +1285,7 @@ static int acp_audio_probe(struct platform_device *pdev)
        audio_drv_data->capture_i2ssp_stream = NULL;
        audio_drv_data->play_i2sbt_stream = NULL;
        audio_drv_data->capture_i2sbt_stream = NULL;
+       audio_drv_data->play_i2s_micsp_stream = NULL;
 
        audio_drv_data->asic_type =  *pdata;
 
@@ -1333,6 +1374,11 @@ static int acp_pcm_resume(struct device *dev)
                config_acp_dma(adata->acp_mmio, rtd, adata->asic_type);
        }
        if (adata->asic_type != CHIP_CARRIZO) {
+               if (adata->play_i2s_micsp_stream &&
+                   adata->play_i2s_micsp_stream->runtime) {
+                       rtd = 
adata->play_i2s_micsp_stream->runtime->private_data;
+                       config_acp_dma(adata->acp_mmio, rtd, adata->asic_type);
+               }
                if (adata->play_i2sbt_stream &&
                    adata->play_i2sbt_stream->runtime) {
                        rtd = adata->play_i2sbt_stream->runtime->private_data;
diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h
index db80a73aa593..b29bef90f886 100644
--- a/sound/soc/amd/acp.h
+++ b/sound/soc/amd/acp.h
@@ -55,6 +55,7 @@
 
 #define I2S_SP_INSTANCE                 0x01
 #define I2S_BT_INSTANCE                 0x02
+#define I2S_MICSP_INSTANCE             0x03
 #define CAP_CHANNEL0                   0x00
 #define CAP_CHANNEL1                   0x01
 
@@ -85,6 +86,10 @@
 #define I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM 10
 #define ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM 11
 
+/* Playback DMA channels for I2S MICSP instance */
+#define SYSRAM_TO_ACP_MICSP_INSTANCE_CH_NUM  4
+#define ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM 5
+
 #define NUM_DSCRS_PER_CHANNEL 2
 
 #define PLAYBACK_START_DMA_DESCR_CH12 0
@@ -108,8 +113,15 @@
 #define CAPTURE_START_DMA_DESCR_CH11 14
 #define CAPTURE_END_DMA_DESCR_CH11 15
 
+/* I2S MICSP Instance DMA Descriptors */
+#define PLAYBACK_START_DMA_DESCR_CH4 0
+#define PLAYBACK_END_DMA_DESCR_CH4 1
+#define PLAYBACK_START_DMA_DESCR_CH5 2
+#define PLAYBACK_END_DMA_DESCR_CH5 3
+
 #define mmACP_I2S_16BIT_RESOLUTION_EN       0x5209
 #define ACP_I2S_MIC_16BIT_RESOLUTION_EN 0x01
+#define ACP_I2S_MICSP_16BIT_RESOLUTION_EN 0x01
 #define ACP_I2S_SP_16BIT_RESOLUTION_EN 0x02
 #define ACP_I2S_BT_16BIT_RESOLUTION_EN 0x04
 #define ACP_BT_UART_PAD_SELECT_MASK    0x1
@@ -149,6 +161,7 @@ struct audio_drv_data {
        struct snd_pcm_substream *capture_i2ssp_stream;
        struct snd_pcm_substream *play_i2sbt_stream;
        struct snd_pcm_substream *capture_i2sbt_stream;
+       struct snd_pcm_substream *play_i2s_micsp_stream;
        void __iomem *acp_mmio;
        u32 asic_type;
        snd_pcm_sframes_t delay;
-- 
2.25.1

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