From: Eric Bernstein <eric.bernst...@amd.com>

After some experimental tests, we noticed that we need to set
gpuvm_max_page_table_levels to '4' to meet the hardware requirements.

Signed-off-by: Eric Bernstein <eric.bernst...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c   | 2 +-
 drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
index 63227c55a2f0..1f2af676191b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
@@ -121,7 +121,7 @@ static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 
0x000000C0, 0x000034C
 
 struct _vcs_dpi_ip_params_st dcn3_2_ip = {
        .gpuvm_enable = 1,
-       .gpuvm_max_page_table_levels = 1,
+       .gpuvm_max_page_table_levels = 4,
        .hostvm_enable = 0,
        .rob_buffer_size_kbytes = 128,
        .det_buffer_size_kbytes = DCN3_2_DEFAULT_DET_SIZE,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
index 644f00f2def0..1a9bdfc35f2c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
@@ -124,7 +124,7 @@ static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 
0x000000C0, 0x000034C
 
 struct _vcs_dpi_ip_params_st dcn3_21_ip = {
        .gpuvm_enable = 1,
-       .gpuvm_max_page_table_levels = 1,
+       .gpuvm_max_page_table_levels = 4,
        .hostvm_enable = 0,
        .rob_buffer_size_kbytes = 128,
        .det_buffer_size_kbytes = DCN3_2_DEFAULT_DET_SIZE,
-- 
2.25.1

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