Applied. Thanks! Alex
On Tue, Aug 23, 2022 at 3:15 AM <jin...@126.com> wrote: > > From: Qu Huang <jin...@126.com> > > The mmVM_L2_CNTL3 register is not assigned an initial value > > Signed-off-by: Qu Huang <jin...@126.com> > --- > drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c > b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c > index 1da2ec692057e..b8a987a032a8e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c > @@ -176,6 +176,7 @@ static void mmhub_v1_0_init_cache_regs(struct > amdgpu_device *adev) > tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); > WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp); > > + tmp = mmVM_L2_CNTL3_DEFAULT; > if (adev->gmc.translate_further) { > tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12); > tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, > -- > 2.31.1 >