[PATCH 08/14] drm/amd/display: read invalid ddc pin status cause engine busy

[Stylon Wang]

From: Paul Hsieh <paul.hs...@amd.com>

[Why]
There is no DDC_6 pin on new asic cause the mapping table is
incorrect. When app try to access DDC_VGA port, driver read
an invalid ddc pin status and report engine busy.

[How]
Add dummy DDC_6 pin to align gpio structure.

Reviewed-by: Alvin Lee <alvin.l...@amd.com>
Acked-by: Stylon Wang <stylon.w...@amd.com>
Signed-off-by: Paul Hsieh <paul.hs...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c 
b/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
index 0ea52ba5ac82..9fd8b269dd79 100644
--- a/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
+++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
@@ -256,8 +256,8 @@ static const struct hw_factory_funcs funcs = {
  */
 void dal_hw_factory_dcn32_init(struct hw_factory *factory)
 {
-       factory->number_of_pins[GPIO_ID_DDC_DATA] = 6;
-       factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 6;
+       factory->number_of_pins[GPIO_ID_DDC_DATA] = 8;
+       factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8;
        factory->number_of_pins[GPIO_ID_GENERIC] = 4;
        factory->number_of_pins[GPIO_ID_HPD] = 5;
        factory->number_of_pins[GPIO_ID_GPIO_PAD] = 28;
-- 
2.25.1