On Mon, Jan 30, 2023 at 11:16 AM Mario Limonciello
<mario.limoncie...@amd.com> wrote:
>
> A mistake has been made on some boards with NBIO 4.3.0 where some
> NBIO registers aren't properly set by the hardware.
>
> Ensure that they're set during initialization.
>
> Cc: Natikar Basavaraj <basavaraj.nati...@amd.com>
> Tested-by: Satyanarayana ReddyTVN <satyanarayana.reddy...@amd.com>
> Tested-by: Rutvij Gajjar <rutvij.gaj...@amd.com>
> Signed-off-by: Mario Limonciello <mario.limoncie...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
> b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
> index 15eb3658d70e6..4b1c6946a60f3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
> @@ -337,6 +337,13 @@ const struct nbio_hdp_flush_reg nbio_v4_3_hdp_flush_reg
> = {
>
> static void nbio_v4_3_init_registers(struct amdgpu_device *adev)
> {
> + if (adev->ip_versions[NBIO_HWIP][0] == IP_VERSION(4, 3, 0)) {
> + uint32_t data;
> +
> + data = RREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2);
> + data &=
> ~RCC_DEV0_EPF2_STRAP2__STRAP_NO_SOFT_RESET_DEV0_F2_MASK;
> + WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2, data);
> + }
> return;
You can drop the return here. With that, the patch is:
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> }
>
> --
> 2.34.1
>
