Fix a coding error which results to null interrupt
handler for umc ras.

Signed-off-by: Hawking Zhang <hawking.zh...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
index da68ceaa024c..9e2e97207e53 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
@@ -232,7 +232,7 @@ int amdgpu_umc_ras_sw_init(struct amdgpu_device *adev)
        if (!ras->ras_block.ras_late_init)
                ras->ras_block.ras_late_init = amdgpu_umc_ras_late_init;
 
-       if (ras->ras_block.ras_cb)
+       if (!ras->ras_block.ras_cb)
                ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb;
 
        return 0;
-- 
2.17.1

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