Added AMD_IP_BLOCK_TYPE_MES to the list of engine
under amdgpu_device_ip_reinit_late_sriov, so that MES engine can be
correctly reset in SRIOV environment

Signed-off-by: Bill Liu <bill....@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 065f5396d0ce..0d9061151048 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3183,7 +3183,8 @@ static int amdgpu_device_ip_reinit_late_sriov(struct 
amdgpu_device *adev)
                AMD_IP_BLOCK_TYPE_MES,
                AMD_IP_BLOCK_TYPE_UVD,
                AMD_IP_BLOCK_TYPE_VCE,
-               AMD_IP_BLOCK_TYPE_VCN
+               AMD_IP_BLOCK_TYPE_VCN,
+               AMD_IP_BLOCK_TYPE_MES
        };
 
        for (i = 0; i < ARRAY_SIZE(ip_order); i++) {
-- 
2.34.1

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