There is a mixup where AMDGPU_RAS_BLOCK__DF is used as a mask instead of a shifter. It means that this condition will be true for AMDGPU_RAS_BLOCK__MMHUB instead of for AMDGPU_RAS_BLOCK__DF.
Fixes: b6f512168478 ("drm/amdgpu: Add fatal error handling in nbio v4_3") Signed-off-by: Dan Carpenter <erro...@gmail.com> --- >From static analysis. Not tested at all. drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index fac45f98145d..4069bce9479f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -2564,7 +2564,7 @@ int amdgpu_ras_init(struct amdgpu_device *adev) adev->nbio.ras = &nbio_v7_4_ras; break; case IP_VERSION(4, 3, 0): - if (adev->ras_hw_enabled & AMDGPU_RAS_BLOCK__DF) + if (adev->ras_hw_enabled & (1 << AMDGPU_RAS_BLOCK__DF)) /* unlike other generation of nbio ras, * nbio v4_3 only support fatal error interrupt * to inform software that DF is freezed due to -- 2.39.1