From: Sridevi Arvindekar <sridevi.arvinde...@amd.com>

[WHY&HOW]
Code cleanup found in internal tests

Reviewed-by: Dillon Varone <dillon.var...@amd.com>
Acked-by: Stylon Wang <stylon.w...@amd.com>
Signed-off-by: Sridevi Arvindekar <sridevi.arvinde...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 5ac85df158b9..37cab11d1b31 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2855,7 +2855,7 @@ void dcn20_fpga_init_hw(struct dc *dc)
        res_pool->mpc->funcs->mpc_init(res_pool->mpc);
 
        /* initialize OPP mpc_tree parameter */
-       for (i = 0; i < dc->res_pool->res_cap->num_opp; i++) {
+       for (i = 0; i < dc->res_pool->pipe_count; i++) {
                res_pool->opps[i]->mpc_tree_params.opp_id = 
res_pool->opps[i]->inst;
                res_pool->opps[i]->mpc_tree_params.opp_list = NULL;
                for (j = 0; j < MAX_PIPES; j++)
-- 
2.42.0

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