On 09/06, Harry Wentland wrote: > > > On 2023-08-10 12:03, Melissa Wen wrote: > > Map the plane CTM driver-specific property to DC plane, instead of DC > > stream. The remaining steps to program DPP block are already implemented > > on DC shared-code. > > > > Signed-off-by: Melissa Wen <m...@igalia.com> > > --- > > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 + > > .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 25 +++++++++++++++++++ > > 2 files changed, 26 insertions(+) > > > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > index dfe61c5ed49e..f239410234b3 100644 > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > @@ -9578,6 +9578,7 @@ static bool should_reset_plane(struct > > drm_atomic_state *state, > > if (dm_old_other_state->degamma_tf != > > dm_new_other_state->degamma_tf || > > dm_old_other_state->degamma_lut != > > dm_new_other_state->degamma_lut || > > dm_old_other_state->hdr_mult != > > dm_new_other_state->hdr_mult || > > + dm_old_other_state->ctm != dm_new_other_state->ctm || > > dm_old_other_state->shaper_lut != > > dm_new_other_state->shaper_lut || > > dm_old_other_state->shaper_tf != > > dm_new_other_state->shaper_tf || > > dm_old_other_state->lut3d != dm_new_other_state->lut3d || > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c > > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c > > index 86a918ab82be..7ff329101fd4 100644 > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c > > @@ -1158,6 +1158,8 @@ int amdgpu_dm_update_plane_color_mgmt(struct > > dm_crtc_state *crtc, > > struct dc_plane_state *dc_plane_state) > > { > > struct amdgpu_device *adev = drm_to_adev(crtc->base.state->dev); > > + struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state); > > + struct drm_color_ctm *ctm = NULL; > > struct dc_color_caps *color_caps = NULL; > > bool has_crtc_cm_degamma; > > int ret; > > @@ -1209,6 +1211,29 @@ int amdgpu_dm_update_plane_color_mgmt(struct > > dm_crtc_state *crtc, > > return ret; > > } > > > > + /* Setup CRTC CTM. */ > > + if (dm_plane_state->ctm) { > > + ctm = (struct drm_color_ctm *)dm_plane_state->ctm->data; > > + > > + /* > > + * So far, if we have both plane and CRTC CTM, plane CTM takes > > + * the priority and we discard data for CRTC CTM, as > > + * implemented in dcn10_program_gamut_remap(). However, we > > Isn't it the opposite? If stream (crtc) has a CTM we program that, only if > stream doesn't have a CTM we program the plane one?
yeah, you're right. It was an intermediate approach that was discarded. Indeed, I think I need to rewrite it to better describe that CRTC CTM priority regarding DPP gamut remap matrix. Thanks for pointing it out. Melissa > > Harry > > > + * have MPC gamut_remap_matrix from DCN3 family, therefore we > > + * can remap MPC programing of the matrix to MPC block and > > + * provide support for both DPP and MPC matrix at the same > > + * time. > > + */ > > + __drm_ctm_to_dc_matrix(ctm, > > dc_plane_state->gamut_remap_matrix.matrix); > > + > > + dc_plane_state->gamut_remap_matrix.enable_remap = true; > > + dc_plane_state->input_csc_color_matrix.enable_adjustment = > > false; > > + } else { > > + /* Bypass CTM. */ > > + dc_plane_state->gamut_remap_matrix.enable_remap = false; > > + dc_plane_state->input_csc_color_matrix.enable_adjustment = > > false; > > + } > > + > > return amdgpu_dm_plane_set_color_properties(plane_state, > > dc_plane_state, color_caps); > > } >