From: Leo Ma <hanghong...@amd.com>

[ Upstream commit 735688eb905db529efea0c78466fccc1461c3fde ]

[Why]
Screen underflows happen on 175hz timing for 3 plane overlay case.

[How]
Based on dst y prefetch value clamp to equ or oto for bandwidth
calculation.

Reviewed-by: Dillon Varone <dillon.var...@amd.com>
Acked-by: Alex Hung <alex.h...@amd.com>
Signed-off-by: Leo Ma <hanghong...@amd.com>
Tested-by: Daniel Wheeler <daniel.whee...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 .../amd/display/dc/dml/dcn32/display_mode_vba_util_32.c    | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git 
a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 61cc4904ade41..4c645854b263b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -3463,6 +3463,7 @@ bool dml32_CalculatePrefetchSchedule(
        double TimeForFetchingMetaPTE = 0;
        double TimeForFetchingRowInVBlank = 0;
        double LinesToRequestPrefetchPixelData = 0;
+       double LinesForPrefetchBandwidth = 0;
        unsigned int HostVMDynamicLevelsTrips;
        double  trip_to_mem;
        double  Tvm_trips;
@@ -3892,11 +3893,15 @@ bool dml32_CalculatePrefetchSchedule(
                        TimeForFetchingMetaPTE = Tvm_oto;
                        TimeForFetchingRowInVBlank = Tr0_oto;
                        *PrefetchBandwidth = prefetch_bw_oto;
+                       /* Clamp to oto for bandwidth calculation */
+                       LinesForPrefetchBandwidth = dst_y_prefetch_oto;
                } else {
                        *DestinationLinesForPrefetch = dst_y_prefetch_equ;
                        TimeForFetchingMetaPTE = Tvm_equ;
                        TimeForFetchingRowInVBlank = Tr0_equ;
                        *PrefetchBandwidth = prefetch_bw_equ;
+                       /* Clamp to equ for bandwidth calculation */
+                       LinesForPrefetchBandwidth = dst_y_prefetch_equ;
                }
 
                *DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 * 
TimeForFetchingMetaPTE / LineTime, 1.0) / 4.0;
@@ -3904,7 +3909,7 @@ bool dml32_CalculatePrefetchSchedule(
                *DestinationLinesToRequestRowInVBlank =
                                dml_ceil(4.0 * TimeForFetchingRowInVBlank / 
LineTime, 1.0) / 4.0;
 
-               LinesToRequestPrefetchPixelData = *DestinationLinesForPrefetch -
+               LinesToRequestPrefetchPixelData = LinesForPrefetchBandwidth -
                                *DestinationLinesToRequestVMInVBlank - 2 * 
*DestinationLinesToRequestRowInVBlank;
 
 #ifdef __DML_VBA_DEBUG__
-- 
2.40.1

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