[PATCH v2] drm/amd/pm: call smu_cmn_get_smc_version in is_mode1_reset_supported.

[Yifan Zhang]

is_mode1_reset_supported may be called before smu init, when smu_context
is unitialized in driver load/unload test. Call smu_cmn_get_smc_version
explicitly in is_mode1_reset_supported.

v2: apply to aldebaran in case is_mode1_reset_supported will be
uncommented (Candice Li)

Fixes: 5fe5098c64d9 ("drm/amd/pm: drop most smu_cmn_get_smc_version in smu")
Signed-off-by: Yifan Zhang <yifan1.zh...@amd.com>
---
 .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c    |  8 +++++++-
 drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c     | 10 +++++++++-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   |  8 +++++++-
 3 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 090249b6422a..77c3d76c76a2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -2461,12 +2461,18 @@ static bool 
sienna_cichlid_is_mode1_reset_supported(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
        uint32_t val;
+       uint32_t smu_version;
+       int ret;
 
        /**
         * SRIOV env will not support SMU mode1 reset
         * PM FW support mode1 reset from 58.26
         */
-       if (amdgpu_sriov_vf(adev) || (smu->smc_fw_version < 0x003a1a00))
+       ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+       if (ret)
+               return false;
+
+       if (amdgpu_sriov_vf(adev) || (smu_version < 0x003a1a00))
                return false;
 
        /**
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index f082cd4b40c1..1a6675d70a4b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1931,11 +1931,19 @@ static bool aldebaran_is_mode1_reset_supported(struct 
smu_context *smu)
 #if 0
        struct amdgpu_device *adev = smu->adev;
        uint32_t val;
+       uint32_t smu_version;
+       int ret;
+
        /**
         * PM FW version support mode1 reset from 68.07
         */
-       if ((smu->smc_fw_version < 0x00440700))
+       ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+       if (ret)
                return false;
+
+       if ((smu_version < 0x00440700))
+               return false;
+
        /**
         * mode1 reset relies on PSP, so we should check if
         * PSP is alive.
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index b1433973380b..648d5eafb27b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -2615,13 +2615,19 @@ static int smu_v13_0_0_baco_exit(struct smu_context 
*smu)
 static bool smu_v13_0_0_is_mode1_reset_supported(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
+       u32 smu_version;
+       int ret;
 
        /* SRIOV does not support SMU mode1 reset */
        if (amdgpu_sriov_vf(adev))
                return false;
 
        /* PMFW support is available since 78.41 */
-       if (smu->smc_fw_version < 0x004e2900)
+       ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+       if (ret)
+               return false;
+
+       if (smu_version < 0x004e2900)
                return false;
 
        return true;
-- 
2.37.3