-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
Hello Jan,
On 11/20/2013 08:14 PM, Jan Kromhout wrote:
> Please can you tell me where to find the SPI words.
> Are there SPI exampels?
please find below an excerpt from one of my projects. An atmega32
controller with a maxim-186 ADC connected via spi. The select pin of
max-186 is connected to pin PortC.2 on the controller, NOT /ss.
The most unobvious thing is this: In order to configure spi
to work as a master, you must enable the pullup on pin /ss.
See function " +spi ".
Don't be put off by the somewhat complex control of the ADC.
The spi communication is very simple:
0. activate spi (once)
1. activate chip select for the desired spi connected chip
... loop
2. write a byte
3. read the returned byte and store it somewhere
... until done
4. deactivate chip select
The code below is tested in its complete context. I hope the
snippet is sufficient.
Cheers,
Erich
\ atmega32 . spi - max186 - mpx4115
\ --- pins -------------------------------------------------
decimal
PORTC 2 portpin: _sel \ maxim 186 12bit ADC
PORTB 5 portpin: _mosi
PORTB 6 portpin: _miso
PORTB 7 portpin: _clk
\ --- include begin ewlib/spi.fs
\ 2010-05-24 EW ewlib/spi.fs
\ spi, using hw interface
\ needs in dict_appl.inc: .include "words/spirw.asm"
\ words:
\ +spi ( -- )
\ -spi ( -- )
\ ><spi ( x -- x' ) transfer 2 bytes
\ Needs at least these definitions
\ SPI
\ $2D constant SPCR \ SPI Control Register
\ $2F constant SPDR \ SPI Data Register
\ $2E constant SPSR \ SPI Status Register
\ needs lib/bitnames.frt \ port_pin: high low pin_{out,in}put
\ ----------------------------------------------------------
\ SPCR (control register)
\ . 7 SPIE spi interrupt enable
\ . 6 SPE spi enable
\ . 5 DORD data order, 0 msb first
\ . 4 MSTR master/slave mode, 1 master
\ . 3 CPOL clock polarity, 0 clock low on idle
\ . 2 CPHA clock phase, 0 sample on leading edge
\ . 01 SPIR data rate, 00 f/4, 01 f/16, 10 f/64, 11 f/128
\ SPE | MSTR | SPIR0 ==> $51
\ needs these defined before loading:
PORTB 4 portpin: /ss
\ PORTB 5 portpin: _mosi
\ PORTB 6 portpin: _miso
\ PORTB 7 portpin: _clk
: +spi ( -- )
/ss high \ activate pullup!
_mosi high _mosi pin_output
_clk low _clk pin_output
\ _miso pin_pullup_on \ not needed, see datasheet
$53 SPCR c! \ enable, master mode, f/128 data rate
;
: -spi 0 SPCR c! ;
\ transfer 1 byte: c!@spi ( c -- c' )
\ transfer 1 cell: !@spi ( n1 -- n2 )
\ --- include end ewlib/spi.fs
: +spi.lsb.first SPCR c@ %00100000 or SPCR c! ;
: +spi.msb.first SPCR c@ %00100000 invert and SPCR c! ;
\ --- include begin ewlib/spi-maxim-186.fs
\ 2010-05-24 EW spi-maxim-186.fs
\ 2010-11-04 EW spirw -> c!@spi
\ words:
\ max186.init ( -- )
\ max186.get ( pinNr -- value )
\ needs portpin: _sel defined before loading
\ needs some more stuff to be generally useful
\ max186.pin>ch ( n -- addr_bits )
\ @max186 ( pin_nr -- value )
\ cleanup: _sel is maybe too short: sel_max186 ?
: max186.init
_sel high
_sel pin_output
;
\ control byte
\ 7 START 1. bit after /cs falling edge indicates control byte
\ 6 SEL2 channel addr
\ 5 SEL1 .
\ 4 SEL0 .
\ 3 UNI 1 unipolar, 0 bipolar -V/2 .. +V/2
\ 2 SGL 1 single ended, 0 differential
\ 1 PD1 . 11 external clock mode
\ 0 PD0
\ ==> %1___1111 == $8f | channel_addr<<4
\ pin Nr -> channel addr, single ended (datasheet Ch.
\ sel2,1,0]
\ 1 0 0 0
\ 2 1 0 0
\ 3 0 0 1
\ 4 1 0 1
\ 5 0 1 0
\ 6 1 1 0
\ 7 0 1 1
\ 8 1 1 1
: max186.pin>channel ( pinNr -- channel-addr )
$07 and \ clip to 3 bit
>r
r@ $01 and 2 lshift \ -- sel2
r@ $04 and 1 rshift \ -- sel2 sel1
r> $02 and 1 rshift \ -- sel2 sel1 sel0
or or
;
\ 1 clock cycle is lost; we should wait for SSTRB to become high
\ instead. However, we are slow enough. So "3 rshift" not "4 rshift"
: max186.get ( pinNr -- value )
max186.pin>channel 4 lshift
$8f or \ 1___1111 | _ccc____
_sel low
c!@spi drop \ spirw drop
0 !@spi \ 0 spirw 0 spirw
_sel high
\ swap 8 lshift +
3 rshift
;
\ --- include end ewlib/spi-maxim-186.fs
\ --- include begin ewlib/mpx41xx.fs
\ 2010-05-28 EW ewlib/mpx41xx.fs
\
\ words to convert raw adc values to physical units
\ Freescale MPX-4100 absolute pressure sensor
\ Freescale MPX-4115
decimal
10000 value AltScale \ exp(h/8005)*1.0e4
\ set this scale factor after loading this file, e.g.
\ &10063 to AltScale \ 50m
\ &10125 to AltScale \ 100m
\ &10711 to AltScale \ 550m -> exp(550/8005)*1e4
\ &11331 to AltScale \ 1000m
\ MPX 4110 A
\ Vout = VS (P x 0.01059 - 0.1518) [kPa?] (see datasheet)
\ Vout/VS = P x 0.01059 - 0.1518
\ Vout/VS + 0.1518 = P x 0.01059
\ (Vout/VS + 0.1518)/0.01059 = P [kPa]
\ P[kPa] = (raw/4096 + 0.1518) * exp(h/8005)/0.01059
\ | kPa -> 1000Pa, frac{a}{b} -> frac{1.0e5 a}{1.0e5 b}
\ P[Pa] = (raw*1000/4096 + 151.8 ) * exp(h/8005)*10000*10/1059
\ | ( ) -> 100*()/100, exp(h/8005)*10000 -> AltScale
\ = (raw*100000/4096 + 15180 )/100 * AltScale*10/1059
\ = (raw*100000/4096 + 15180 )/10 * AltScale/1059
\ | 1 Pa -> 1/100 (hPa) -> 1/10 (hPa/10)
\ P[hPa/10] = (raw*100000/4096 +15180 )/100 * AltScale/1059
: mpx4100.decode12 ( raw[0..4095] -- p[hPa/10] )
s>d
1000 1 m*/
100 4096 m*/
15180 m+
AltScale 1059 m*/
1 100 m*/
d>s
;
\ MPX 4115 A
\ Vout = VS x (0.009 x P - 0.095)
\ Vout/VS = 0.009 x P - 0.095
\ Vout/VS + 0.095 = 0.009 x P
\ (Vout/Vs + 0.095)/0.009 = P [kPa]
: mpx4115.decode12 ( raw[0..4095] -- p[hPa/10] )
\ P[kPa] = (raw/4096 + 0.095) * exp(h/8005)/0.0090
\ | kPA = 1000Pa, frac{1.0e4 a}{1.0e4 b}
\ P[Pa] = (raw*1000/4096 + 95) * exp(h/8005)*10000/90
\ | exp(h/8005)*10000 -> AltScale
\ P[Pa] = (raw*1000/4096 + 95) * AltScale/90
\ | 1 Pa -> 1/100 (hPa) -> 1/10 (hPa/10)
\ P[hPa/10] = (raw*1000/4096 + 95) * AltScale/900
s>d
1000 4096 m*/
95 m+
AltScale 900 m*/
d>s
;
\ --- include end ewlib/mpx41xx.fs
\ mpx4115.decode12 ( N[0..4095] -- p[hPa/10] )
&10711 to AltScale \ 550m -> exp(550/8005)*1e4
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
Comment: Using GnuPG with Icedove - http://www.enigmail.net/
iQIcBAEBAgAGBQJSj6pdAAoJEHx024vXVRNQdkgQAKImdnwiAJ60wDgeeuxdy8BZ
x8UY2DGP7fcS74zyBDchNRI20RBY42X1nHO7P+eBVvPpLTge5vQeavnoUrYFda/f
V22ZTz0BATsj0bfEXbe3BLuVkkwSwH4irVOITOb1YVBQjpaY8iNqXlqhFhnnyrL8
H8SA7k2V88CudDBTpAAUVVPaj89UI6rWkUukfUxi2xC94BUj6mPDGdE69lx4yK1/
QgmVPEu4eRU9l1pOIlY6DVRPX9gn0nJxaayeXu8iVqEwu2j8nyS5p8iIgIB0d4v/
2JWgC1Ezje0yWHE0QxYieCfYyQZUiRXI3RSsXrhAKCuphQ5of/PVp5D95olH+SLw
fDgv/mOnBY6zB4IW2UiUIlw0Z8Xp188Vv8WLH4UTmxpWAwZAv5r+vez5Tb4zVq0J
yctgRXWVdHSdi8H1q7YiBn6NvYpmMOcDpt77XzP83MJQsi/ZS/mvuqpWu+YyXQx5
zrZ7M+tEMVqiPmsiRBqFJLUOIAClZFFHWqOknoW/WwlMBwZxGEU1qQ0gPKlfSE26
4v3hoeUq9WePE6u62l/xUUebN1TuKvtVEFZbpF3tMv92/J+0bAYiEUMf0ovCnlOl
i+ymq80hd7EU7GaaozSEc6Pbbcyxk+jgM4vvo6AsG0IwKXtq6Wb3uCudfZtFN2o2
xhBfdvlFcasdvoBNEJZY
=KxzD
-----END PGP SIGNATURE-----
------------------------------------------------------------------------------
Shape the Mobile Experience: Free Subscription
Software experts and developers: Be at the forefront of tech innovation.
Intel(R) Software Adrenaline delivers strategic insight and game-changing
conversations that shape the rapidly evolving mobile landscape. Sign up now.
http://pubads.g.doubleclick.net/gampad/clk?id=63431311&iu=/4140/ostg.clktrk
_______________________________________________
Amforth-devel mailing list for http://amforth.sf.net/
[email protected]
https://lists.sourceforge.net/lists/listinfo/amforth-devel
