Hi,
Hope you are doing good. *Please share me profiles to md.kh...@3sbc.com <chandra....@3sbc.com>* *Design Verification Engineer* *Location: Multiple locations* *Upto 6 Months**.* *Experience Range* 5 -7 Years *Job Description & Skill Requirement : * *Need complete education details in resume along with specialisation.* System verilog coding of test-benches, to verify of ASIC and FPGA hardware blocks. Work with designers for debug and coverage. Help with ASIC verification infrastructure maintenance. Help with Integration testing and regressions. Assist with performance analysis, verification and improvement. Skills: Verilog / System verilog coding Experience with one or more procedural coding languages (Python, C++) Experience with UVM and / or modern ASIC Verification tool-sets. Education: Bachelor's in EE/CS/CE with 4+ years experience. Required Skills: INTEGRATION TESTING, DEBUG, APPLICATION-SPECIFIC INTEGRATED CIRCUIT, INTEGRATION, VERILOG Additional Skills: ASIC, C++, CODING, FIELD PROGRAMMABLE GATE ARRAY, FPGA, INTEGRATOR, MAINTENANCE, ENGINEER, PERFORMANCE ANALYSIS, PYTHON Regards, *Md.Khazababu* Recruiter 3*S* Business Corporation Inc(*3SBC*) P: 281-823-9222 Ext 518 | F: 281-823-9225 Email: md.kh...@3sbc.com| <meena.bhu...@3sbc.com%7C> www.3sbc.com Hangouts – khaza3...@gmail.com <meena.bhusara3...@gmail.com%7C%20Skype> *3S Business Corporation Inc. 11271 Richmond Ave, Suite # H107, # H108 Houston, Texas. 77082* -- You received this message because you are subscribed to the Google Groups "Android Discuss" group. To unsubscribe from this group and stop receiving emails from it, send an email to android-discuss+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/android-discuss/CAKPjPOQnXfQanAPejCtR2-DWooXGsfkLRWzb%3DWJOfpUiDroabw%40mail.gmail.com.
Design Verification Engineer.csv
Description: MS-Excel spreadsheet
