On Wed, Aug 5, 2009 at 3:47 AM, Ouyang Jiannan <jallen....@gmail.com> wrote:

> Thanks
> I've noticed that bionic uses address 0xffff0ff0 to implement TLS in arm
> But isn't this address a space of kernel? How can a user space program
> access that address without a soft-interupt...
>
> Or the memory map in arm is different from x86, so the high 1G mem is not
> kernel used only?
>

I don't know the details, but I know it relies on a weird kernel tricks. Be
it a special page fault, or
a special page mapping.

Actually, another similar address contains the address of a function to be
called by user code to get the same TLS pointer.
This is supposedly more portable (it is used by the ARMv4T port, if I
remember correctly), but can also be slower.

The ARMv6 way of using a dedicated register is supposed to get much better
performance, but of course can't be
used by NDK-generated binaries which are built for ARMv5TE.


>
> On Wed, Aug 5, 2009 at 3:06 AM, David Turner <di...@android.com> wrote:
>
>>
>>
>> On Tue, Aug 4, 2009 at 12:24 PM, Neo <zingafri...@yahoo.com> wrote:
>>
>>>
>>>
>>>
>>> On Aug 4, 8:17 am, Ouyang Jiannan <jallen....@gmail.com> wrote:
>>> > hi, everyone,
>>> > In bionic/libc/Android.mk we can see that
>>> > x86 uses files pthread.c, pthread-timers.c ptrace.c and __get_tls.c
>>> > in arm, it uses pthread.c.arm , pthread-timers.c.arm, ptrace.c.arm
>>> > But I can't find these files or places which generate it
>>> >
>>> > So what's the arm support of TLS? Is there a reg uses as gs in x86 as a
>>> > pointer to tls?
>>>
>>> TLS is not supported in android though it is present in armv6 and
>>> later.
>>
>>
>> TLS is supported in Android (there wouldn't be any pthread implementation
>> anyway).
>>
>> The current ARM implementation doesn't use an ARMv6-specific register but
>> instead
>> relies on a small kernel trick (which updates a very specific user virtual
>> address on each
>> context switch instead).
>>
>>
>>>
>>>
>>>
>>
>>
>>
>
> >
>

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